CMOS Image Sensor Vertical Charge Transfer for Pixel Miniaturization
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Solution Overview
Problem
Recent advancements in CMOS image sensors, particularly with increased pixel miniaturization and multi-functionalization, lead to a trade-off between saturation electric charge capacity and conversion efficiency, causing deterioration in imaging characteristics due to the need for pixel sharing and longer electric charge transfer paths.
Innovation Solution
A solid-state imaging device is designed with vertical transfer gates and an electric charge storage section between them, allowing for efficient electric charge transfer and storage, while planar transfer gates cover the outer periphery of the storage section to enhance transfer efficiency and reduce the risk of transfer failure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If pixel miniaturization is implemented, then the number of pixels increases, but the saturation electric charge capacity decreases and conversion efficiency deteriorates
Solution Approach 1:
The patent transitions from a planar charge transfer path to a three-dimensional vertical charge transfer path by introducing vertical transfer gates that extend in the depth direction of the semiconductor substrate. This allows electric charges to be transferred vertically from the photoelectric conversion section to the floating diffusion, shortening the transfer path and improving transfer efficiency while maintaining adequate charge capacity despite pixel miniaturization
2Area of moving object
If pixel sharing system is employed, then the necessary PD area is provided, but the saturation electric charge capacity increases and conversion efficiency decreases
Solution Approach 1:
The patent uses vertical transfer gates extending in the depth direction to enable efficient charge transfer from a larger photodiode area to the floating diffusion. This three-dimensional charge transfer path allows pixel sharing to be implemented with adequate PD area while maintaining high conversion efficiency through improved transfer efficiency
3Device complexity
If the FD is provided next to the vertical transfer gate electrode, then the structure is simplified, but the transfer path becomes long and transfer failure increases
Solution Approach 1:
Instead of placing the floating diffusion laterally adjacent to the vertical transfer gate (which creates a long bent transfer path), the patent positions the floating diffusion vertically above the vertical transfer gate, aligning them in the depth direction. This inversion of the spatial relationship creates a direct vertical transfer path, shortening the charge transfer distance and improving transfer efficiency
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the transfer efficiency of electric charges, reduces the risk of transfer failure, and allows for more transistors in each pixel without pixel sharing, thereby maintaining high conversion efficiency and imaging quality.
Implementation Method 1
a photoelectric conversion section provided inside a semiconductor substrate, the photoelectric conversion section being configured to generate electric charges in accordance with an amount of received light
Data Source
AI summary
To suppress deterioration of imaging characteristics. A solid-state imaging device includes a photoelectric conversion section provided inside a semiconductor substrate, the photoelectric conversion section being configured to generate electric charges in accordance with an amount of received light, a plurality of vertical transfer gates arranged between the photoelectric conversion section and one principal surface of the semiconductor substrate in a depth direction of the semiconductor substrate and spaced apart from each other in a direction along a substrate surface of the semiconductor substrate, the plurality of vertical transfer gates each being configured to control transfer of the electric charges generated by the photoelectric conversion section, and an electric charge storage section disposed between the plurality of vertical transfer gates, the electric charge storage section being configured to store the electric charges transferred by the plurality of vertical transfer gates.