CMOS Image Sensor Superlattice Crosstalk Reduction
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Solution Overview
Problem
Current semiconductor devices, such as CMOS image sensors, face limitations in charge carrier mobility and crosstalk between pixels, which affect their performance and efficiency.
Innovation Solution
Incorporating a semiconductor superlattice with stacked groups of layers, including non-semiconductor monolayers like oxygen within the crystal lattice of silicon, to enhance charge carrier mobility and reduce crosstalk by modifying energy band structures and providing improved retrograde well profiles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional semiconductor structures are used, then manufacturing is simpler, but charge carrier mobility is limited
Solution Approach 1:
The semiconductor structure is segmented into multiple alternating layers of different materials (e.g., SiGe and Si) forming a superlattice. Each layer is thin and has specific compositional characteristics. This segmentation creates a periodic modulation of the conduction band that enhances carrier mobility through reduced effective mass and increased velocity, while maintaining manufacturability through established epitaxial growth techniques.
Solution Approach 2:
The patent employs composite material structures where alternating layers of silicon-germanium (SiGe) and silicon (Si) are grown epitaxially. The SiGe layers provide tensile strain to the Si channels, while the Si layers provide compressive strain. This composite approach creates a superlattice with engineered band structures that significantly improve charge carrier mobility compared to conventional homogeneous semiconductor materials.
2Object-affected harmful factors
If conventional semiconductor structures are used, then device structure is simpler, but crosstalk between pixels increases
Solution Approach 1:
The superlattice structure acts as an intermediary barrier between adjacent pixels in the CMOS image sensor. The alternating SiGe/Si layers create potential wells and barriers that confine charge carriers within specific pixel regions, preventing carrier diffusion into neighboring pixels. This intermediary structure effectively reduces crosstalk while maintaining pixel isolation functionality.
Solution Approach 2:
The superlattice introduces local variations in material composition and strain characteristics at the pixel boundaries. The SiGe layers provide localized tensile strain regions that create potential barriers, while Si layers provide compressive strain regions. This local quality variation creates an energy landscape that confines carriers to their respective pixels, reducing crosstalk without requiring extensive lateral isolation structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The superlattice structure achieves higher charge carrier mobility and reduced crosstalk between adjacent pixels, leading to improved performance and efficiency in CMOS image sensors by modifying energy band structures and acting as a barrier to dopant and material diffusion.
Implementation Method 1
enhance charge carrier mobility and reduce crosstalk by modifying energy band structures
Implementation Method 2
acting as a barrier to dopant and material diffusion
Implementation Method 3
reduce crosstalk between adjacent pixels
Data Source
AI summary
A CMOS image sensor may include a semiconductor substrate having a first conductivity type, and a superlattice on the semiconductor substrate including a plurality of stacked groups of layers. Each group of layers may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and a non-semiconductor monolayer(s) constrained within a crystal lattice of adjacent base semiconductor portions. The image sensor may further include a plurality of laterally adjacent photodiodes on the superlattice. Each photodiode may include a semiconductor layer on the superlattice and having a first conductivity type dopant and with a lower dopant concentration than the semiconductor substrate, a retrograde well extending downward into the semiconductor layer from a surface thereof and having a second conductivity type, a first well around a periphery of the retrograde well having the first conductivity type, and a second well within the retrograde well having the first conductivity type.


