CMOS Thermopile Stretch Contacts for Low Impedance

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Solution Overview

Problem

Integrated circuits with CMOS transistors and thermoelectric devices face challenges due to high thermal and electrical impedance through metal interconnects, which hinder the integration of low impedance connections for thermoelectric elements.

Innovation Solution

The formation of stretch contacts with lateral aspect ratios greater than 4:1 over n-type and p-type thermoelectric elements, made by creating contact trenches in a dielectric layer and filling them with metal, provides electrical and thermal connections to a thermal node, concurrently with contacts to NMOS and PMOS transistors, reducing impedance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional metal interconnects are used to connect thermoelectric elements, then the integrated circuit can be manufactured with standard processes, but the thermal and electrical impedance becomes unacceptably high

Engineering Contradiction:
ImprovemanufacturabilityVSAvoidthermal and electrical impedance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent transitions from conventional point-contact vias to extended stretch contacts that stretch laterally across multiple interconnect lines. This dimensional change from vertical-only to lateral-plus-vertical contact provides both low impedance pathways and compatibility with standard CMOS manufacturing processes

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The stretch contacts are designed to extend across multiple interconnect lines, effectively segmenting the thermal and electrical pathways. This segmentation allows the contact to interface with multiple conductors simultaneously, reducing overall impedance while maintaining manufacturability

Inventive Principle:
Principle #1Segmentation

2Reliability

If stretch contacts with high metal coverage are formed, then thermal and electrical impedance is reduced, but the fabrication process becomes more complex

Engineering Contradiction:
ImproveimpedanceVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the formation of stretch contacts with the existing CMOS contact formation process. By integrating the stretch contact fabrication into the standard contact formation sequence, the process achieves high metal coverage without adding significant process complexity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The stretch contacts serve multiple functions: they provide low impedance electrical connections, thermal pathways, and are formed using the same processes as standard CMOS contacts. This multi-functionality reduces the need for separate specialized process steps

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If larger contact areas are used to reduce impedance, then more dielectric material must be removed, increasing manufacturing difficulty

Engineering Contradiction:
ImproveimpedanceVSAvoidcontact trench formation
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies different contact geometries to different locations: stretch contacts with large lateral dimensions are used specifically over thermoelectric elements where low impedance is critical, while standard contacts are used elsewhere. This localized approach reduces overall manufacturing difficulty while achieving impedance reduction where needed

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in lower electrical and thermal impedance between thermoelectric elements and interconnects, enhancing the performance of thermoelectric devices by providing a higher fraction of metal coverage and improved thermal conductivity.

Implementation Method 1

provide electrical and thermal connections through metal interconnects to a thermal node of the embedded thermoelectric device

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

provide electrical and thermal connections through metal interconnects to a thermal node of the embedded thermoelectric device

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS9818795B2CMOS compatible thermopile with low impedance contact
Publication Date: 2017.11.14 TEXAS INSTRUMENTS INC
  • US9818795B2 patent drawing
  • US9818795B2 patent drawing
  • US9818795B2 patent drawing

AI summary

In described examples, an integrated circuit containing CMOS transistors and an embedded thermoelectric device may be formed by forming active areas which provide transistor active areas for an NMOS transistor and a PMOS transistor of the CMOS transistors and provide n-type thermoelectric elements and p-type thermoelectric elements of the embedded thermoelectric device. Stretch contacts with lateral aspect ratios greater than 4:1 are formed over the n-type thermoelectric elements and p-type thermoelectric elements to provide electrical and thermal connections through metal interconnects to a thermal node of the embedded thermoelectric device. The stretch contacts are formed by forming contact trenches in a dielectric layer, filling the contact trenches with contact metal and subsequently removing the contact metal from over the dielectric layer. The stretch contacts are formed concurrently with contacts to the NMOS and PMOS transistors.