Differential CMOS TIA Biasing for 400G Photodiode Sensitivity
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Solution Overview
Problem
Existing communication systems face challenges in scaling and performance due to low breakdown voltage in deep-submicron CMOS processes and the need for higher bias voltages in photo-detectors for better photo-current responsivity, which limits the efficiency of high-speed optical receivers.
Innovation Solution
A fully differential self-biased transimpedance amplifier (TIA) device is implemented on a single integrated circuit chip, utilizing deep n-well regions and CMOS cells to provide customizable bias voltages, eliminating the need for external bias circuits and improving sensitivity by AC-coupling the photodiode to the TIA.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If CMOS technology is scaled down to deep-submicron processes to increase speed and reduce chip area, then operating speed increases and chip area decreases, but breakdown voltage decreases to around 1 Volt
Solution Approach 1:
The patent introduces a third supply voltage rail (VSSN) below the traditional ground potential, creating a negative voltage domain. This dimensional extension in voltage space allows the photodetector to receive its required >2V bias across anode-cathode while the TIA operates at low 1V supply, resolving the voltage compatibility issue between scaled CMOS and photodetector requirements
Solution Approach 2:
The patent segments the power supply system into three independent voltage rails: VDD (positive supply), VSS (ground), and VSSN (negative supply). This segmentation allows different voltage requirements of various circuit blocks (photodetector needing high voltage, TIA needing low voltage) to be satisfied simultaneously without interference
2Measurement precision
If photodetectors are biased with more than 2 Volts to improve photo-current responsivity, then photo-current responsivity improves, but device complexity increases due to additional bias circuits
Solution Approach 1:
The VSSN rail serves multiple functions simultaneously: it provides the negative bias for the photodetector cathode to achieve >2V bias voltage, establishes the reference potential for the TIA input, and enables level shifting between differential stages. This multi-functionality eliminates the need for separate bias circuits, reducing complexity while maintaining high photo-current responsivity
3Measurement precision
If external bias circuits are used to provide higher bias voltages to photodetectors, then photo-current responsivity improves, but system complexity and cost increase
Solution Approach 1:
The patent merges the photodetector bias circuitry with the TIA input stage by sharing the VSSN rail. The negative supply simultaneously biases the photodetector and sets the TIA virtual ground, combining what would traditionally be separate biasing functions into a unified power distribution scheme, thereby reducing system complexity and cost
Data Source
AI summary
A transimpedance amplifier (TIA) device. The device includes a photodiode coupled to a differential TIA with a first and second TIA, which is followed by a Level Shifting/Differential Amplifier (LS/DA). The photodiode is coupled between a first and a second input terminal of the first and second TIAs, respectively. The LS/DA can be coupled to a first and second output terminal of the first and second TIAs, respectively. The TIA device includes a semiconductor substrate comprising a plurality of CMOS cells, which can be configured using 28 nm process technology to the first and second TIAs. Each of the CMOS cells can include a deep n-type well region. The second TIA can be configured using a plurality CMOS cells such that the second input terminal is operable at any positive voltage level with respect to an applied voltage to a deep n-well for each of the plurality of second CMOS cells.