CMOS Ultrasonic Delay Element for Temperature-Stable GHz Timing
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Solution Overview
Problem
Existing delay elements in electronics are sensitive to process and temperature variations, and supply voltage fluctuations, making them unstable and temperature-dependent, which is a challenge for achieving precise and stable delay in applications like clocking systems and RF signal processing.
Innovation Solution
A CMOS-compatible ultrasonic-based delay element that uses a piezoelectric transducer to generate and propagate ultrasonic waves through a substrate, providing a stable delay time with a zero temperature coefficient and low Allan deviation, achieved through diffraction-based temperature compensation and impedance mismatch reflections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If inverter-based delay line is used, then delay can be adjusted by number of buffers, but the delay is sensitive to process and temperature variations and supply voltage fluctuations
Solution Approach 1:
The patent replaces electronic delay mechanisms (inverter chains, RC circuits) with acoustic wave propagation through a piezoelectric substrate. The delay is determined by the physical path length and acoustic velocity, which are inherently stable against process and temperature variations, thus achieving both adjustability and stability.
Solution Approach 2:
The patent changes the fundamental parameter determining delay from electrical properties (number of inverters, RC time constants) to acoustic properties (path length, acoustic velocity). This parameter transformation enables delay stability while maintaining adjustability through geometric configuration.
2Device complexity
If RC delay elements are used, then delay can be implemented with simple circuitry, but the approach suffers from high temperature dependence (2500 ppm/°C)
Solution Approach 1:
The patent substitutes electrical RC delay with acoustic wave propagation. The acoustic velocity in piezoelectric substrates has much lower temperature coefficients compared to RC time constants, reducing temperature dependence from 2500 ppm/°C to less than 6 ppm while keeping the device structure relatively simple.
Solution Approach 2:
The patent uses composite structures combining piezoelectric materials with CMOS circuitry. The piezoelectric substrate provides temperature-stable acoustic propagation, while CMOS circuits provide signal generation and detection, achieving low temperature dependence without excessive complexity.
3Temperature
If surface acoustic wave (SAW)-based delay lines are used, then temperature sensitivity is reduced, but they are difficult to integrate on CMOS with high (long) delay values
Solution Approach 1:
The patent transitions from surface acoustic waves (2D propagation) to bulk acoustic waves (3D propagation through substrate thickness). This dimensional change enables longer delay paths within the same footprint and simplifies CMOS integration by using standard substrate structures rather than complex surface patterns.
Solution Approach 2:
The patent merges the delay function with the CMOS substrate structure itself. The substrate serves both as the mechanical support for CMOS devices and as the acoustic waveguide, eliminating the need for separate SAW structures and simplifying integration while achieving long delay values.
4Object-affected harmful factors
If known thyristor-based delay element is used, then supply noise rejection is enhanced, but temperature coefficient remains at 314 ppm/°C
Solution Approach 1:
The patent replaces electronic delay mechanisms with acoustic wave propagation. The acoustic velocity in piezoelectric substrates has temperature coefficients an order of magnitude lower than thyristor-based circuits (less than 6 ppm vs. 314 ppm/°C), while maintaining good supply noise rejection through the inherent isolation of acoustic waves from electrical noise.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves a stable delay time with an Allan deviation of 0.87 ps (<6 ppm) and zero temperature coefficient, ensuring high long-term stability and compatibility with CMOS integration, suitable for various timing applications.
Implementation Method 1
a single piezoelectric transducer integrally disposed on or in the substrate, wherein the single piezoelectric transducer is adapted to generate an ultrasonic wave packet
Implementation Method 2
an interface between a bottom surface of the substrate and a medium immediately adjacent the bottom surface of the substrate exhibits an impedance mismatch whereby the bottom surface of the substrate is a reflective surface for the ultrasonic wave packet
Data Source
AI summary
A CMOS compatible GHz ultrasonic pulse/echo transmit-receive ultrasonic delay element demonstrating less than <6 ppm stability over time and having a zero-temperature coefficient of delay at two temperatures. The delay element includes one or more CMOS compatible piezoelectric transducers requiring no release step, which transmit and/or receive a GHz-ultrasonic wave packet. The bulk substrate exhibits low loss for the GHz-ultrasonic wave packet transmitted through the substrate and uses the phenomenon of diffraction to retrieve multiple reflections.


