CMOS Voltage Divider Circuit to Prevent Diffusion Layer Forward Bias
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Solution Overview
Problem
The reliability of complementary metal oxide semiconductor (CMOS) circuits in semiconductor devices, such as NAND flash memory, is compromised due to the risk of not obtaining a desired output voltage when a forward bias is applied between the impurity diffusion layer and the substrate, leading to potential voltage divider circuit failures.
Innovation Solution
A semiconductor device design that includes a first conductivity type semiconductor substrate with a second conductivity type impurity diffusion layer, a resistance element, and a transistor with a gate connected to the input of the resistance element, source connected to the impurity diffusion layer, and drain connected to a voltage source, ensuring a reverse bias is maintained to prevent forward bias and leakage current, thereby stabilizing the voltage divider circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a voltage divider circuit is used in the CMOS circuit, then the output voltage can be obtained, but a forward bias may be applied between the impurity diffusion layer and substrate due to voltage changes, causing reliability deterioration
Solution Approach 1:
A transistor is introduced as an intermediary component between the resistance element and the impurity diffusion layer. The transistor controls the voltage applied to the impurity diffusion layer, preventing direct forward bias while allowing the voltage divider circuit to function. This mediator protects the pn junction from harmful forward bias conditions.
Solution Approach 2:
The circuit design proactively prevents forward bias by applying a reverse bias voltage to the pn junction between the impurity diffusion layer and substrate. This preliminary anti-action counteracts the potential forward bias that would occur during normal voltage divider operation, eliminating the harmful effect before it can cause reliability deterioration.
2Adaptability or versatility
If the input voltage of the resistance element changes, then the voltage divider circuit can operate, but forward bias may occur leading to inability to obtain desired output voltage
Solution Approach 1:
The circuit dynamically adjusts the voltage applied to the impurity diffusion layer through the transistor's gate control. As the input voltage changes, the transistor modulates the voltage to maintain proper bias conditions, allowing the voltage divider to adapt to varying input conditions while preserving output stability and preventing forward bias.
3Reliability
If forward bias is applied to the impurity diffusion layer and substrate, then leakage current increases, but the desired output voltage cannot be obtained
Solution Approach 1:
The circuit design proactively prevents forward bias by applying a reverse bias voltage to the pn junction between the impurity diffusion layer and substrate. This preliminary anti-action counteracts the potential forward bias that would occur during normal voltage divider operation, eliminating the harmful effect before it can cause reliability deterioration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design ensures the semiconductor device can reliably obtain and maintain desired output voltages, enhancing the reliability of the CMOS circuit by preventing forward bias and maintaining stable resistance values, even under varying input voltages.
Implementation Method 1
ensuring a reverse bias is maintained to prevent forward bias and leakage current
Data Source
AI summary
A semiconductor device has a first conductivity type semiconductor substrate. A second conductivity type first impurity diffusion layer is disposed in a surface region of the semiconductor substrate. A resistance element is configured with a first conductivity type second impurity diffusion layer disposed in the first impurity diffusion layer in the surface region of the semiconductor substrate. In a transistor, a gate is connected to an input portion of the resistance element, a source is connected to the first impurity diffusion layer, and a drain is connected to a voltage source higher than the voltage of the input portion. A current source is connected to the source.