On-Chip Voltage Regulator for CMOS Leakage Reduction

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Solution Overview

Problem

Conventional body biasing apparatuses in CMOS circuits increase power consumption due to extra current consumption from charge pumps and require additional pins for off-chip voltage supply, which is not fully utilized, leading to inefficiencies in power management.

Innovation Solution

A power managing apparatus that includes a voltage generating device for generating reference voltages and a voltage switching device to adjust supply and substrate voltages in CMOS circuits, allowing for different operating modes to optimize voltage configurations and reduce leakage current, thereby minimizing power loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-generated harmful factors

If charge pumps are used to generate positive and negative voltages for body biasing, then the threshold voltage of transistors is increased and leakage current is reduced, but extra current is consumed and the number of devices on the chip increases

Engineering Contradiction:
Improveleakage currentVSAvoidcurrent consumption
Core Design Contradiction:
Object-generated harmful factorsVSUse of energy by moving object

Solution Approach 1:

The patent extracts the voltage generation function from external off-chip sources and integrates it into an on-chip voltage generating device. This eliminates the need for external charge pumps while maintaining the body biasing function, thereby reducing current consumption and device count on the chip.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The voltage generating device on the chip provides multiple functions: generating both positive voltage (V+) and negative voltage (V-) for body biasing, as well as providing the system voltage (Vdd). This multi-functional approach replaces multiple separate voltage supply components, reducing overall current consumption and device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If off-chip voltage sources are used to provide V+ and V-, then voltage supply capability is sufficient, but additional pins are required on the chip for receiving these voltages

Engineering Contradiction:
Improvevoltage supply capabilityVSAvoidnumber of pins
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the voltage generation function with the existing on-chip power supply infrastructure. The voltage generating device integrates the generation of V+, V-, and Vdd within the chip, eliminating the need for separate external voltage sources and their associated pins, thus reducing device complexity while maintaining reliable voltage supply.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The on-chip voltage generating device serves multiple purposes: it generates the system voltage (Vdd) and the body bias voltages (V+ and V-) simultaneously. This multi-functional design eliminates the need for additional pins that would otherwise be required for external voltage inputs, reducing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If diffusion area of transistor is reduced to decrease parasitic capacitance, then circuit performance is improved, but short channel effect increases and leakage current increases

Engineering Contradiction:
Improvecircuit performanceVSAvoidleakage current
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent changes the voltage parameters applied to the transistor bodies by implementing dynamic body biasing. By adjusting the body voltage (Vb) relative to the source voltage (Vd), the threshold voltage (Vth) of the transistor is modified, which directly controls the leakage current. This allows the transistor to maintain low leakage current even with reduced diffusion area.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces leakage current and power consumption by dynamically adjusting voltages within the CMOS circuit, enhancing power management efficiency and reducing the need for additional chip pins for voltage supply.

Implementation Method 1

the voltage regulator to control the substrate bias and supply voltage in a CMOS digital circuitry

Methodology Applied
Scientific EffectBody biasing effect:

Data Source

PatentUS7492215B2Power managing apparatus
Publication Date: 2009.02.17 REALTEK SEMICON CORP
  • US7492215B2 patent drawing
  • US7492215B2 patent drawing
  • US7492215B2 patent drawing

AI summary

A power managing apparatus is utilized to control a first supply voltage, a second supply voltage, and a substrate voltage of a digital circuit. The power managing apparatus includes a voltage generating device, for generating a first reference voltage and a second reference voltage; and a voltage switching device, coupled to the voltage generating device, for adjusting the first supply voltage, the second supply voltage, and the substrate voltage. When the digital circuit operates in a first operating mode, the voltage switching device outputs the second reference voltage to be the first supply voltage and the substrate voltage; and when the digital circuit operates in a second operating mode, the voltage switching device outputs the first reference voltage to be the first supply voltage, and outputs the second reference voltage to be the second supply voltage.