Semiconductor Conductive Layer Structure for CMP Dishing Control
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Solution Overview
Problem
The challenge of dishing in conductive layers during chemical mechanical polishing (CMP) in semiconductor manufacturing leads to subsequent connection issues, which are difficult to address due to the limitations of existing slurry properties.
Innovation Solution
Incorporating support pillars in the dielectric layer outside the conductive layer, utilizing the polishing selectivity of the slurry to control and focus on removing parts of the conductive layer, thereby aligning it with or slightly elevating it above the support pillars.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If chemical mechanical polishing (CMP) is used to remove dielectric material and conductive material simultaneously, then the dielectric material can be removed to a certain amount, but dishing in the conductive layer occurs leading to connection issues
Solution Approach 1:
The patent introduces support pillars as intermediary structures formed in the dielectric layer before CMP. These pillars serve as a mediator that interacts with the slurry during polishing, using the selectivity between dielectric material and support pillar materials to control the polishing process and prevent dishing in the conductive layer.
Solution Approach 2:
The patent changes the material parameters of the support pillars to achieve different polishing rates compared to the dielectric layer. By selecting support pillar materials with specific polishing selectivity relative to the dielectric layer and conductive material, the polishing process parameters are effectively modified to prevent dishing while maintaining connection quality.
2Manufacturing precision
If the properties of the slurry are changed to improve CMP outcomes, then polishing performance may be improved, but it is difficult to change the properties of the slurry
Solution Approach 1:
Instead of changing slurry properties, the patent changes the material composition and physical properties of the support pillars. This approach achieves different polishing rates by modifying the workpiece material parameters rather than the consumable (slurry) parameters, which is more practically feasible in manufacturing.
Solution Approach 2:
The support pillars act as an intermediary that enables control over polishing outcomes without requiring slurry modification. The pillars mediate between the slurry and the conductive layer, allowing the existing slurry to achieve desired polishing results through its interaction with the pillar structures.
3Reliability
If support pillars are incorporated in the dielectric layer, then dishing in the conductive layer is reduced, but the device structure becomes more complex
Solution Approach 1:
The support pillars serve multiple functions: they provide mechanical support in the dielectric layer, act as polishing rate control elements during CMP, and serve as reference structures for conductive layer formation. This multi-functionality justifies the additional structural element by providing several benefits simultaneously.
Solution Approach 2:
The support pillars are formed in advance during the dielectric layer processing stage, before the conductive layer is deposited. This preliminary action establishes the polishing control structures early in the process flow, enabling subsequent CMP to proceed with better control over dishing prevention.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces dishing in the conductive layer, improving subsequent connection quality and enhancing the overall semiconductor structure.
Implementation Method 1
chemical mechanical polishing (CMP) is commonly used to remove parts of the dielectric material and the conductive material simultaneously
Data Source
AI summary
A semiconductor structure is provided. The semiconductor structure includes a dielectric layer, a conductive layer, and at least one support pillar. The conductive layer is disposed in the dielectric layer, and the support pillar is disposed in the dielectric layer and outside the conductive layer.


