CMU-PMIC DVFS Control for Mobile Power Efficiency
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional dynamic voltage and frequency scaling (DVFS) techniques in mobile devices face limitations due to software-mediated interactions between the application processor and the power management integrated circuit (PMIC), leading to delayed or ineffective changes in operating frequency and voltage, resulting in inefficient power consumption and potential malfunctions.
Innovation Solution
Implementing a clock management unit (CMU) that predicts the operating state of the CPU and provides operating frequency information to the PMIC, allowing for hardware-based, real-time adjustments to the application processor's frequency and voltage, thereby enabling faster and more accurate DVFS operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If software-mediated interaction between application processor and PMIC is used, then ease of operation is improved, but speed of frequency and voltage adjustment deteriorates
Solution Approach 1:
The patent introduces a voltage regulator as an intermediary component between the application processor and PMIC. This voltage regulator receives operating frequency information from the application processor and directly adjusts the operating voltage accordingly, bypassing the slow software-mediated interaction through the PMIC. The intermediary enables direct hardware-level control while maintaining the benefits of software-based frequency prediction.
2Adaptability or versatility
If software-mediated DVFS operation is implemented, then adaptability is improved, but productivity deteriorates
Solution Approach 1:
The voltage regulator acts as a hardware intermediary that directly translates operating frequency information into corresponding voltage adjustments. This eliminates the productivity loss associated with software-mediated DVFS operations while preserving the adaptability benefits of dynamic frequency and voltage scaling based on CPU operating states.
3Speed
If real-time hardware-based DVFS is implemented, then speed is improved, but device complexity increases
Solution Approach 1:
The patent adds a voltage regulator intermediary that simplifies the overall system architecture by creating a direct hardware feedback path. Rather than complex software control loops, the voltage regulator directly responds to operating frequency information, achieving real-time DVFS with minimal additional complexity.
4Ease of operation
If software-mediated interaction is used, then ease of operation is improved, but reliability deteriorates
Solution Approach 1:
The voltage regulator intermediary ensures reliable voltage-frequency matching by directly coupling the operating frequency information to the voltage control mechanism. This hardware-level direct coupling eliminates the timing delays and potential mismatches that occur in software-mediated interactions, thereby improving reliability while maintaining ease of operation.
Data Source
AI summary
A method of performing a dynamic voltage and frequency scaling operation comprises controlling a clock management unit (CMU) to predict an operating state of a central processing unit (CPU) and to provide operating frequency information to a power management integrated circuit (PMIC) based on the predicted operating state of the CPU, the operating frequency information indicating a change of an operating frequency of an application processor, and controlling the PMIC to change an operating voltage of the application processor based on the operating frequency information provided from the clock management unit.