CMUT-on-CMOS Ultrasonic Transducer Vertical Interconnection
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Solution Overview
Problem
Traditional ultrasonic transducers face challenges in miniaturization due to the complexity of metal interconnections and bonding pads, which lead to increased chip size, power consumption, and manufacturing costs, while also degrading performance.
Innovation Solution
A CMUT-on-CMOS ultrasonic transducer architecture is developed using a three-step process: fusion bonding of two wafers with prefabricated CMUT and CMOS structures, thinning of the top wafer to release CMUT cells, and vertical interconnection of the wafers to achieve a high-density, compact system.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional piezoelectric ceramic transducers are mechanically diced and re-arranged to form arrays, then the transducer can be assembled, but the process is time-consuming, prone to mishandling, and difficult to control manufacturing yield and cost
Solution Approach 1:
The patent divides the transducer array into multiple independent CMUT elements that are fabricated separately on CMOS substrates using standard semiconductor processes, then bonded together to form the complete array. This segmentation enables parallel manufacturing of multiple elements simultaneously, dramatically improving productivity while maintaining precise control over each element's characteristics.
Solution Approach 2:
The patent replaces the traditional mechanical dicing and wiring process with a semiconductor-based fabrication approach. Instead of mechanically cutting and assembling piezoelectric ceramics, the transducer elements are created using photolithography, etching, and deposition processes on CMOS substrates, eliminating manual handling and improving manufacturing precision and yield.
2Measurement precision
If ultrasonic transducer array density is increased, then imaging resolution is improved, but metal interconnection complexity and chip area increase rapidly
Solution Approach 1:
The patent transitions from planar interconnection to three-dimensional vertical interconnection by stacking multiple CMUT layers on top of each other. Each layer is connected to the substrate through vertical vias, allowing high-density element arrangement in the vertical dimension rather than spreading elements out in the planar dimension. This dramatically reduces the chip area required for high-resolution arrays.
Solution Approach 2:
The patent implements a nested structure where multiple CMUT layers are stacked vertically, with each layer containing multiple elements. The layers are interconnected through vertical vias that pass through the substrate, creating a compact three-dimensional arrangement that fits many more elements into a smaller footprint area.
3Measurement precision
If ultrasonic transducer array density is increased, then imaging resolution is improved, but parasitic resistance and capacitance in metal interconnections increase, degrading performance
Solution Approach 1:
The patent uses vertical vias to connect CMUT elements to the substrate, replacing long horizontal metal traces with short vertical connections. This dimensional change dramatically reduces the length of interconnection paths, thereby minimizing parasitic resistance and capacitance that would otherwise degrade transducer performance at high array densities.
4Ease of manufacture
If standard CMOS manufacturing process is used for PMUT, then manufacturing compatibility is achieved, but special piezoelectric materials and equipment are required that are not found in existing CMOS fabs
Solution Approach 1:
The patent changes the material parameter from piezoelectric materials (AlN, PZT) to capacitive materials that are compatible with standard CMOS processes. By using conductive layers and dielectric materials already available in CMOS fabs, the transducer can be manufactured using existing semiconductor fabrication equipment and processes, eliminating the need for special material deposition and handling facilities.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables the creation of a compact, high-density ultrasonic transducer system that reduces chip size and power consumption while improving performance, and can be manufactured using existing CMOS fabs, making it more economical and suitable for mass production.
Implementation Method 1
fusion bonding of two wafers with prefabricated CMUT and CMOS structures
Data Source
AI summary
The present invention provides a new architecture of system-on-chip ultrasonic transducer array. It is based on fusion bond of two active wafers which have prefabricated CMOS integrated circuits and CMUT structures; precise thin-down of one wafer to form CMUT monocrystalline silicon membrane; and then to vertically connect CMUT array to CMOS IC layers underneath. This architecture can realize a high-density CMUT array with multiple layers of CMOS devices, such as all supporting CMOS ICs, to achieve a SOC solution. The present invention further provides a manufacturing method for above-mentioned SOC CMUT approach, and this manufacturing process can be realized in both 8 inch and 12-inch wafer manufacturing fabs. The disclosed manufacturing processes are more compatible with existing CMOS process flow, more cost-competitive for mass production.