CMUT Dielectric Stack and Electrode Layout for Voltage Drift Control
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Solution Overview
Problem
Capacitive micro-electromechanical switches, particularly capacitive RFMEMS and CMUTs, face challenges in maintaining operational stability and image quality due to voltage drift caused by charging effects and polarization in collapse mode, leading to reduced lifespan and suboptimal performance in ultrasound systems.
Innovation Solution
A capacitive RFMEMS design featuring a dielectric stack with layers of varying electrically active defect densities, where one layer is fabricated using atomic layer deposition (ALD) and another using chemical vapor deposition (CVD), along with a concentric electrode layout and a third electrode to control electric field distribution, minimizes voltage drift by canceling out polarization and space charge orientation effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If CMUT cells are operated in collapse mode to optimize acoustic power output, then transmission and reception characteristics are improved, but voltage drift occurs due to charging effects in dielectric layers
Solution Approach 1:
The patent changes the physical parameters of the dielectric layers by controlling their thickness and defect density. The first dielectric layer is made thinner (5-20 nm) with higher defect density, while the second layer is thicker (20-50 nm) with lower defect density. This parameter optimization balances polarization and space charge effects to minimize voltage drift while maintaining collapse mode operation for optimal acoustic power output
Solution Approach 2:
The patent uses a composite dielectric stack consisting of two different dielectric materials (SiO2 and Si3N4) with complementary properties. The SiO2 layer provides high breakdown voltage and the Si3N4 layer provides low defect density, creating a composite structure that simultaneously achieves high power output and voltage stability in collapse mode operation
2Power
If high bias voltage is applied to drive CMUT cells into collapse mode, then acoustic power output increases, but dielectric charging effects increase causing voltage drift
Solution Approach 1:
The patent converts the harmful dielectric charging effects into a beneficial balance by carefully designing the dielectric stack. The polarization effect in the first layer and space charge effect in the second layer both occur under high bias voltage, but they are engineered to produce opposite voltage drifts that cancel each other out. This allows the system to operate in collapse mode with high acoustic power output while the harmful charging effects neutralize each other
3Reliability
If multiple dielectric layers are added to minimize voltage drift, then device complexity increases, but manufacturing processes remain compatible with CMOS
Solution Approach 1:
The patent designs the dielectric stack to serve multiple functions simultaneously: the first dielectric layer provides both electrical insulation and controlled polarization effect, while the second layer provides both insulation and space charge effect. The same dielectric layers also serve as structural support and stress management elements. This multi-functionality reduces the need for additional separate components, maintaining manufacturing simplicity despite the enhanced functionality
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design significantly reduces voltage drift, enhancing the lifespan and performance of CMUT cells, maintaining image quality and operational stability by balancing charging effects, thus meeting standards for medical ultrasound imaging.
Implementation Method 1
polarizing the first dielectric layer to a first degree of polarization and the second dielectric layer to a second degree of polarization, lower than the first degree, thereby causing a negative drift in the bias voltage
Implementation Method 2
orienting space charges within the first dielectric layer to a first level of orientation and within the second dielectric layer to a second level of orientation, greater than the first level, thereby causing a positive drift in the bias voltage
Implementation Method 3
one layer is fabricated using atomic layer deposition (ALD)
Implementation Method 4
another using chemical vapor deposition (CVD)
Data Source
AI summary
Disclosed are systems and methods of operation for capacitive radio frequency micro-electromechanical switches, such as CMUT cells for use in an ultrasound system. An RFMEMS may include substrate, a first electrode connected to the substrate, a membrane and a second electrode connected to the membrane. In some examples, there is a dielectric stack between the first electrode and the second electrode and flexible membrane. The dielectric stack design minimizes drift in the membrane collapse voltage. In other examples, one of the electrodes is in the form of a ring, and a third electrode is provided to occupy the space in the center of the ring. Alternatively, the first and second electrodes are both in the form of a ring and there is a support between the electrodes inside the rings.


