CMUT Parasitic Reduction via SOI Bonding and Segmented Vias
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Solution Overview
Problem
Existing CMUT technology faces efficiency limitations due to large parasitics caused by integrating CMUT devices onto a CMOS wafer using through-silicon via technology, which results in low efficiency and undesirable resonance modes within the imaging frequency range.
Innovation Solution
The method involves bonding a CMUT substrate to a silicon-on-insulator (SOI) substrate, reducing the substrate thickness, and forming through-silicon vias to minimize parasitics and mitigate resonance issues, while using a thin CMUT substrate and strategically placed bond posts to suppress spurious vibration modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through-silicon via technology is used to integrate CMUT onto CMOS wafer, then electrical connection is achieved, but large parasitics are created resulting in low CMUT efficiency
Solution Approach 1:
The substrate is divided into two separate substrates (first substrate and second substrate) that are bonded together. The through-silicon via is formed only in the first substrate, while the second substrate remains intact with its original thickness, segmenting the via formation process to reduce parasitic capacitance while maintaining electrical connection.
Solution Approach 2:
The device uses a composite structure with two different substrates bonded together, where each substrate can be optimized for different functions. The first substrate is optimized for via formation and electrical connection, while the second substrate maintains the original mechanical and acoustic properties, creating a composite structure that reduces overall parasitics.
2Strength
If thick CMUT substrate is used for rigidity and wafer handling, then mechanical strength is improved, but spurious resonance modes occur within imaging frequency range
Solution Approach 1:
The original thick substrate is segmented into two separate substrates. The first substrate can be made thinner to avoid spurious resonance modes within the imaging frequency range, while the second substrate maintains the required mechanical strength and rigidity for wafer handling. This segmentation allows independent optimization of each substrate's thickness.
Solution Approach 2:
A bonding interface acts as an intermediary between the two substrates, allowing the system to achieve the mechanical strength of a thick substrate while using thinner individual substrates that do not generate spurious resonance modes. The bonding interface transfers mechanical loads while isolating the acoustic fields of the two substrates.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances CMUT device efficiency, reduces parasitics, and increases bandwidth by moving spurious resonance frequencies out of the imaging range, thereby improving the overall performance of the CMUT device.
Implementation Method 1
bonding a CMUT substrate to a silicon on insulator (SOI) substrate
Implementation Method 2
the device layer is bonded to the patterned dielectric layer to form a plurality of sealed cavities
Implementation Method 3
capacitive micromachined ultrasonic transducer (CMUT)
Data Source
AI summary
A method of forming a capacitive micromachined ultrasonic transducer (CMUT) device includes bonding a CMUT substrate to a silicon on insulator (SOI) substrate. The CMUT substrate has a first thickness and the SOI substrate includes a handle, a buried oxide layer, and a device layer. At least one of the CMUT substrate or the SOI substrate includes a patterned dielectric layer. The device layer is bonded to the patterned dielectric layer to form a plurality of sealed cavities and the device layer forms a diaphragm of the plurality of cavities. The method further includes reducing the first thickness of the CMUT substrate to a second thickness and forming a plurality of through-silicon vias from a second surface of the CMUT substrate opposite the first surface.