CNN Accelerator Resource Allocation via Configurable Registers
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Solution Overview
Problem
Current computing configurations, such as single processors, struggle to efficiently support the demands of convolutional neural networks (CNNs) for image recognition and analysis due to limitations in computing power, prompting the need for specialized hardware accelerators.
Innovation Solution
A methodology using electronic design automation (EDA) tools to design and implement CNN accelerators on target devices, such as FPGAs, by assigning resources for buffers, computation units, and sequencer units, allowing for runtime configuration through configurable status registers to support various CNN algorithms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If single processors are used for CNN computations, then device complexity is low, but computing power is insufficient to meet CNN demands
Solution Approach 1:
The CNN accelerator divides the computing task into multiple processing elements (PEs) organized in arrays. Each PE handles specific convolution operations independently, enabling parallel processing of image data. This segmentation increases computing power while keeping individual PE complexity low.
Solution Approach 2:
The processing elements are designed as universal units that can perform multiple functions including convolution operations, activation functions, and support different CNN layer types. This multi-functionality increases overall system power without proportionally increasing device complexity.
2Productivity
If hardware specialization is implemented for CNN acceleration, then computing power increases, but device complexity increases
Solution Approach 1:
The accelerator is segmented into specialized functional units: convolution PEs for filtering operations, pooling units for downsampling, and separate buffer memory regions. This segmentation improves processing efficiency for specific CNN operations while managing overall complexity through modular design.
Solution Approach 2:
Buffer memory structures serve as intermediaries between data sources and processing units, enabling efficient data transfer and storage without requiring complex direct interconnections. This intermediary approach simplifies the overall system architecture while maintaining high processing efficiency.
3Adaptability or versatility
If fixed CNN accelerator architecture is used, then device complexity is reduced, but adaptability to different CNN algorithms is limited
Solution Approach 1:
The accelerator incorporates configurable parameters that can be dynamically adjusted at runtime to match different CNN algorithm requirements. Processing elements can be reconfigured to handle various filter sizes, stride values, and padding configurations, providing adaptability without requiring physical hardware changes.
Solution Approach 2:
The system uses configurable status registers (CSRs) to change operational parameters such as number of PEs active, buffer sizes, and data flow configurations. These parameter changes enable the same hardware to efficiently execute different CNN algorithms while maintaining a relatively simple fixed architecture.
4Productivity
If resource allocation is optimized for specific CNN algorithms, then processing efficiency increases, but versatility across different algorithms decreases
Solution Approach 1:
Processing elements are designed as universal units capable of performing convolution operations with different configurations. The same PE can be optimized for different filter sizes, input dimensions, and algorithm requirements through parameter configuration, maintaining both high performance and broad algorithm support.
Solution Approach 2:
The resource allocation is dynamically adjustable through CSR configuration, allowing the system to optimize processing elements for specific algorithms when needed while maintaining the capability to switch to different configurations for other algorithms. This dynamic reconfiguration enables both specialized optimization and general versatility.
Data Source
AI summary
A method for implementing a convolutional neural network (CNN) accelerator on a target includes utilizing one or more processing elements to implement a standard convolution layer. A configuration of the CNN accelerator is modified to change a data flow between components on the CNN accelerator. The one or more processing elements is utilized to implement a fully connected layer in response to the change in the data flow.