Convolutional Accelerator Buffer Switching for 1x1 Kernel Throughput
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Solution Overview
Problem
Conventional convolutional accelerators are inefficient in processing kernels with smaller dimensions (e.g., 1×1, 1×2, 1×N) due to bandwidth saturation and resource underutilization, leading to reduced throughput and increased fetch operations.
Innovation Solution
A convolutional accelerator with dual modes of operation: a first mode for processing larger kernels (e.g., 3×3) and a second mode that reconfigures data storage in buffers to efficiently handle smaller kernels (e.g., 1×1, 1×2, 1×N) by switching data types between feature and kernel buffers, utilizing mode control circuitry to optimize data flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional convolutional accelerators process smaller kernels (1×1, 1×2, or 1×N), then component switching is required, but this leads to bandwidth saturation and reduced throughput
Solution Approach 1:
The patent implements dynamic mode switching between normal mode and deep mode operation. The system adapts its configuration based on kernel size: for larger kernels (3×3), it operates in normal mode with standard buffer assignments, while for smaller kernels (1×1, 1×2, 1×N), it switches to deep mode where feature data is stored in the kernel buffer and kernel data in the feature line buffer. This dynamic reconfiguration eliminates the need for component switching and maintains high throughput across different kernel dimensions
Solution Approach 2:
The patent changes the operational parameters of the buffer system by swapping the assignment of buffers based on kernel size. In deep mode, the kernel buffer stores feature data and the feature line buffer stores kernel data, effectively inverting the normal mode assignments. This parameter change allows the system to efficiently process smaller kernels without bandwidth saturation, as the deep mode configuration enables three pixel depths per kernel to be processed in a single cycle
2Device complexity
If conventional convolutional accelerators use fixed buffer assignments, then hardware configuration is simple, but efficiency for smaller kernel dimensions is reduced
Solution Approach 1:
The system employs dynamic mode control circuitry that automatically selects between normal mode and deep mode based on the kernel dimensions being processed. This dynamic control adds minimal complexity while dramatically improving processing efficiency for smaller kernels. The mode control unit receives kernel size information and automatically reconfigures the buffer assignments without requiring manual intervention or complex component switching
Solution Approach 2:
The patent makes the buffer system universal by enabling the same physical buffers to serve different functions based on operational mode. The feature line buffer and kernel buffer can swap roles depending on whether the system is in normal mode or deep mode. This multi-functionality allows a single hardware configuration to efficiently handle both large kernels (3×3) and small kernels (1×1, 1×2, 1×N) without requiring dedicated hardware for each kernel size
Data Source
AI summary
A convolutional accelerator includes a feature line buffer, a kernel buffer, a multiply-accumulate cluster, and mode control circuitry. In a first mode of operation, the mode control circuitry stores feature data in a feature line buffer and stores kernel data in a kernel buffer. The data stored in the buffers is transferred to the MAC cluster of the convolutional accelerator for processing. In a second mode of operation the mode control circuitry stores feature data in the kernel buffer and stores kernel data in the feature line buffer. The data stored in the buffers is transferred to the MAC cluster of the convolutional accelerator for processing. The second mode of operation may be employed to efficiently process 1×N kernels, where N is an integer greater than or equal to 1.