CNN Circuit Using 3x3 Filter Kernels for Image Processing
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Solution Overview
Problem
Existing CNN-based approaches for image processing are either too slow or too expensive due to their software-based solutions or hardware designed for other purposes, making them impractical for processing large amounts of imagery data.
Innovation Solution
Implementing a Cellular Neural Networks (CNN) based digital integrated circuit that uses 3×3 filter kernels to replace the combination of first and second original convolutional layers followed by a short path, with CNN processing engines connected in a loop via a clock-skew circuit and memory buffers for efficient data and filter coefficient storage and processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If software-based CNN solutions or hardware designed for other purposes are used, then the system can process image data, but the computational speed is too slow and/or the cost is too high
Solution Approach 1:
The patent replaces software-based CNN processing with a dedicated hardware circuit implementation. The cellular neural network circuit performs convolution operations, activation functions, and pooling operations through hardware logic and analog computing elements, eliminating the overhead of software execution and achieving faster processing speeds while reducing computational costs.
Solution Approach 2:
The cellular neural network circuit is designed to perform multiple functions including convolution operations with configurable filter kernels, activation functions (ReLU, sigmoid, tanh), pooling operations (max pooling, average pooling), and support for both grayscale and color images. This multi-functional design allows a single hardware circuit to replace multiple specialized components.
2Reliability
If deep neural networks with multiple convolutional layers are implemented, then the processing capability is improved, but the computational complexity and processing time increase
Solution Approach 1:
The patent divides the deep neural network into multiple stages, each implemented as a separate cellular neural network circuit. Each stage processes a portion of the feature extraction task, allowing parallel processing and reducing the overall processing time while maintaining the depth and capability of the neural network.
Solution Approach 2:
The circuit performs preliminary computations and feature extractions in hardware before software processing is needed. By pre-computing convolution operations and activation functions in the cellular neural network circuit, the system reduces the computational burden on subsequent software processing stages, thereby reducing total processing time.
Data Source
AI summary
Operations of a combination of first and second original convolutional layers followed by a short path are replaced by operations of a set of three particular convolutional layers. The first contains 2N×N filter kernels formed by placing said N×N filter kernels of the first original convolutional layer in left side and N×N filter kernels of an identity-value convolutional layer in right side. The second contains 2N×2N filter kernels formed by placing the N×N filter kernels of the second original convolutional layer in upper left corner, N×N filter kernels of an identity-value convolutional layer in lower right corner, and N×N filter kernels of two zero-value convolutional layers in either off-diagonal corner. The third contains N×2N of kernels formed by placing N×N filter kernels of a first identity-value convolutional layer and N×N filter kernels of a second identity-value convolutional layer in a vertical stack. Each filter kernel contains 3×3 filter coefficients.