Carbon Nanotube Ternary Logic Circuit for Low-Power Fast Switching
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Solution Overview
Problem
Binary logic-based digital systems face challenges with current leakage and increased power consumption as they become compact and highly integrated, necessitating the development of a ternary logic circuit that can enhance bit density and transition speed.
Innovation Solution
A ternary logic circuit is designed using carbon nanotubes, incorporating a first and second inverter unit connected in parallel with tunnel PN junctions, allowing for three output states by adjusting the input voltage, and utilizing carbon nanotube transistors with different diameters and doping levels to manage threshold voltages and electric fields.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If binary logic systems are made compact and highly integrated, then bit density is increased, but current leakage and power consumption increase
Solution Approach 1:
The patent transitions from binary logic (2 states) to ternary logic (3 states) by changing the fundamental operational parameter of the logic system. This is achieved by using carbon nanotube transistors with different threshold voltages to create three distinct output states (VDD, VDD/2, GND), thereby increasing information density per bit while maintaining similar power consumption characteristics per operation.
2Device complexity
If a ternary logic circuit uses only pull-up and pull-down devices, then device count is reduced, but transition speed becomes slow
Solution Approach 1:
The patent divides the ternary logic circuit into two parallel inverter units (first and second inverters), each responsible for specific threshold voltage ranges. This segmentation allows simultaneous operation paths for different input voltage ranges, improving transition speed while maintaining the simplified pull-up/pull-down device structure. The tunnel PN junctions further segment the voltage response into three distinct states.
Solution Approach 2:
The patent introduces tunnel PN junctions as intermediary components between the inverter units and the output terminal. These junctions act as voltage distributors that split the output voltage into three distinct levels (VDD, VDD/2, GND) based on the input voltage magnitude, enabling fast transitions without requiring complex device switching.
3Manufacturing precision
If carbon nanotubes with different diameters are used, then threshold voltage control is improved, but manufacturing complexity increases
Solution Approach 1:
The patent utilizes the inherent relationship between carbon nanotube diameter and threshold voltage to create transistors with different threshold voltages. By controlling the diameter parameter during material synthesis, the patent achieves precise threshold voltage control without requiring complex post-fabrication adjustments, thereby maintaining manufacturing simplicity while improving device performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables a compact, high-integration ternary logic circuit with reduced power consumption and improved transition speed, achieving three distinct output states while maintaining low power usage, thus addressing the limitations of binary logic systems.
Implementation Method 1
Carbon nanotubes, the threshold voltage of which can be determined by adjusting the diameter thereof, is known as a material suitable for realizing a multi-threshold voltage-based circuit
Implementation Method 2
a first junction unit arranged between the first inverter unit and the output terminal and including a tunnel PN junction
Data Source
AI summary
A ternary logic circuit includes: a first inverter unit; a second inverter unit arranged in parallel with the first inverter unit; a first junction unit arranged between the first inverter unit and an output terminal and including a tunnel PN junction; and a second junction unit arranged between the second inverter unit and the output terminal and including a tunnel PN junction, wherein, when an absolute value of an input voltage applied to an input terminal is less than a first input voltage, the output terminal outputs a first output voltage, and when the absolute value of the input voltage is greater than the first input voltage and less than a second input voltage, the output terminal outputs a second output voltage, and when the absolute value of the input terminal is greater than the second input voltage, the output terminal outputs a third output voltage.