Co-Ni and Cu Interconnect Integration for IC Feature Scaling
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Solution Overview
Problem
As IC dimensions decrease, copper interconnects face issues such as voids, electromigration, and increased line resistance, necessitating the integration of copper and non-copper interconnects based on feature size.
Innovation Solution
A method involving electrochemical deposition of a copper layer on a cobalt or nickel seed layer, where the cobalt or nickel completely fills small features and a cobalt or nickel-copper stack fills larger features, with optional heat treatment and plasma treatment to enhance filling and reduce resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If copper interconnects are used in small features, then deposition is easier and cost is reduced, but voids form during deposition and electromigration and line resistance increase
Solution Approach 1:
The patent applies different metal materials to different feature sizes: copper is used for larger features where deposition is easier, while non-copper materials (cobalt, nickel, tungsten) are used for smaller features where copper exhibits reliability problems. This local differentiation resolves the contradiction by optimizing both ease of manufacture and reliability according to feature size.
Solution Approach 2:
The patent changes the material parameter based on feature size parameters. By selecting different metals (copper, cobalt, nickel, tungsten) depending on the critical dimension of the feature, the system optimizes deposition characteristics and electrical performance for each size regime, resolving the contradiction between ease of manufacture and reliability.
2Quantity of substance
If feature dimensions are decreased to increase device density, then device area decreases and device density increases, but interconnect reliability decreases
Solution Approach 1:
The patent implements local quality by selecting non-copper materials specifically for small features (e.g., features with critical dimension ≤20 nm) while allowing copper in larger features. This resolves the contradiction by maintaining interconnect reliability in the small feature regime where device density increases, while still achieving high device density through continued scaling.
Solution Approach 2:
The patent creates a composite interconnect system where different metal materials are used in different locations based on feature size. The integration of copper, cobalt, nickel, and tungsten in a unified process flow allows the system to achieve both high device density and maintained interconnect reliability across all feature sizes.
3Reliability
If non-copper interconnects are used in small features, then electromigration and line resistance are reduced, but deposition complexity increases
Solution Approach 1:
The patent segments the deposition process into size-based categories: self-aligned deposition for features ≤20 nm and conventional deposition for larger features. This segmentation resolves the contradiction by applying simplified self-aligned processes to the small features where non-copper materials are used, thereby reducing overall deposition complexity while maintaining the reliability benefits of non-copper materials in critical small dimensions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces resistance in interconnects, improves IC performance, and extends the use of copper metallization as IC dimensions scale down, while mitigating high resistance in large lines.
Implementation Method 1
electrochemically depositing a second metal layer on a first metal layer on a workpiece having at least two features of two different sizes
Implementation Method 2
electrochemically depositing a second metal layer on a first metal layer wherein the second metal layer is a copper layer
Implementation Method 3
heat treating the workpiece after deposition of the second metal layer wherein the temperature for heat treating the workpiece may be in the temperature range of 150 degrees C. to 400 degrees C. heat treating the workpiece may anneal the first and second metal layers
Implementation Method 4
plasma treating the first metal layer using hydrogen plasma or hydrogen radicals (H*) prior to electrochemically depositing the second metal layer
Data Source
AI summary
In one embodiment of the present disclosure, a method for depositing metal in a feature on a workpiece is provided. The method includes electrochemically depositing a second metal layer on a first metal layer on a workpiece having at least two features of two different sizes in a dielectric layer, wherein the second metal layer is a copper layer and wherein the first metal layer includes a metal selected from the group consisting of cobalt and nickel, wherein the first metal layer completely fills the smallest feature but does not completely fill the largest feature.