Co-Package Optics Architecture for Protected EIC–PIC Integration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Forming connections between substrates in semiconductor devices poses challenges, particularly in integrating electronic integrated circuits (EICs) and photonic integrated circuits (PICs), which can lead to difficulties in thermal, physical, and electrical protection, as well as increased computational complexity.
Innovation Solution
A system is developed that includes a supportive interchange with a photonic integrated circuit positioned between compute devices, connected via optical fiber, and utilizing redistribution layers to communicatively couple EICs and PICs, with the PIC partially embedded within the supportive interchange, and encapsulated by a protective layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If connections are formed between substrates to integrate EICs and PICs, then computational power is increased, but thermal, physical, and electrical protection becomes difficult
Solution Approach 1:
The photonic integrated circuit is embedded within a cavity formed in the substrate, nesting the PIC within the substrate structure. This nesting approach provides physical protection while maintaining electrical connections through conductive vias that pass through the substrate, thereby achieving both increased computational capability and improved reliability through integrated protection structures
Solution Approach 2:
A redistribution layer is introduced as an intermediary between the PIC and the substrate connections. This redistribution layer facilitates proper electrical routing and signal distribution while isolating the PIC from direct mechanical and thermal stresses of the substrate, thereby protecting the integrated circuit while maintaining computational functionality
2Productivity
If multiple computational components are integrated on multiple substrates, then computational power is increased, but device complexity increases
Solution Approach 1:
The patent merges the EIC and PIC into a single integrated device structure by embedding the PIC within the substrate containing the EIC. This consolidation reduces packaging complexity by eliminating the need for separate substrate interconnections while maintaining the computational benefits of integrating multiple computational components
3Reliability
If photonic integrated circuit is embedded within substrate, then thermal and physical protection is improved, but manufacturing precision requirements increase
Solution Approach 1:
The cavity for embedding the PIC is formed in the substrate before the PIC is placed and connected. This preliminary cavity formation allows for controlled positioning and simplifies the subsequent embedding process, reducing the manufacturing precision requirements compared to attempting to embed the PIC through more complex post-assembly processes
Data Source
AI summary
Systems, methods and devices disclosed herein may include supportive interchange, a first compute device and a second compute device positioned on the supportive interchange, and a photonic integrated circuit positioned between the first compute device and the second compute device. The photonic integrated circuit may communicatively couple the first compute device and the second compute device. An optical fiber connection may couple to the photonic integrated circuit between the first compute device and the second compute device.