Co-processor Function Stream Offloading for Graph Analytics

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Solution Overview

Problem

Existing graph-optimized architectures face challenges with multi-threading approaches that introduce additional programming costs, load balancing considerations, inter-thread synchronizations, and shared memory management, leading to increased runtime overhead and reduced application performance.

Innovation Solution

Implementing a co-processor that supports software-defined serialization of offloaded functions, including custom Direct Memory Access (DMA) operations, with graph traversal behaviors and near-memory compute-on-target capability, exposed through an instruction set architecture (ISA), allowing for concurrent or serialized execution of DMA operations based on programmer requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multi-threading approaches are used in graph-optimized architectures, then graph operations can be performed in parallel, but programming complexity and runtime overhead increase due to load balancing, inter-thread synchronizations, and shared memory management

Engineering Contradiction:
Improvegraph operation throughputVSAvoidprogramming complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system segments graph operations into discrete function streams that can be independently managed and executed. Each function stream represents a self-contained unit of work that can be processed separately, eliminating the need for complex multi-threading coordination while maintaining parallel execution capabilities through stream-level parallelism.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary layer (the function stream mechanism) that sits between the host processor and the accelerated computation units. This intermediary abstracts away the complexity of parallel execution management, allowing developers to define function streams at a high level without dealing with low-level threading, synchronization, and memory management details.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If multi-threading approaches are used in graph-optimized architectures, then graph operations can be performed in parallel, but runtime overhead increases due to load balancing, inter-thread synchronizations, and shared memory management

Engineering Contradiction:
Improvegraph operation throughputVSAvoidruntime overhead
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

By segmenting graph operations into independent function streams, the system eliminates the need for continuous load balancing and inter-thread synchronization that plague multi-threaded approaches. Each stream can be executed to completion without requiring coordination with other streams, significantly reducing runtime overhead.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Function streams are designed to be self-contained and self-sufficient units of work. They manage their own execution state and resources without requiring external coordination or synchronization mechanisms, thereby eliminating the runtime overhead associated with multi-threading management.

Inventive Principle:
Principle #25Self-service

3Productivity

If custom DMA operations with graph traversal behaviors are implemented, then memory and network bandwidth can be saturated for high performance, but system complexity increases

Engineering Contradiction:
Improvememory bandwidth utilizationVSAvoidsystem complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges multiple functions into unified custom DMA operations that perform both data movement and graph traversal behaviors in a single integrated operation. This combination eliminates the need for separate memory access operations and graph processing operations, reducing system complexity while achieving saturation of memory and network bandwidth through efficient single-pass operations.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250110918A1Offloading function streams
Publication Date: 2025.04.03 INTEL CORP
  • US20250110918A1 patent drawing
  • US20250110918A1 patent drawing
  • US20250110918A1 patent drawing

AI summary

Techniques for offloading function streams are described. In some examples, a function is a sequence of instructions and a stream is a sequence of functions. In some examples, a co-processor is to handle functions and/or function streams provided by a main processor. In some examples, the co-processor includes a plurality of execution resources that at least include one or more of a direct memory access (DMA) engine, an atomic engine, and a collectives engine.