Co-simulation Configuration for Circuit Design Emulation
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Solution Overview
Problem
The existing process of co-simulation for circuit designs is hindered by the need to modify HDL code for hardware emulation, which presents a barrier for designers seeking to exploit co-simulation advantages during routine simulation and debugging.
Innovation Solution
A method and system for co-simulating circuit designs by selecting module instances for both software simulation and hardware emulation, compiling them into respective models, configuring programmable logic circuitry, and enabling concurrent simulation and emulation, thereby eliminating the need for manual HDL code modification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If manual HDL code modification is required for hardware emulation configuration, then the programmable logic circuitry can be configured for co-simulation, but the ease of operation deteriorates due to the substantial barrier presented to designers
Solution Approach 1:
The patent introduces an intermediary configuration interface between the design tool and the programmable logic circuitry. This interface allows automatic generation of configuration bitstreams without requiring designers to manually modify HDL code. The intermediary layer translates high-level co-simulation requirements into low-level hardware configuration commands, eliminating the barrier of manual HDL modification while maintaining full configurability of the emulation environment.
Solution Approach 2:
The patent replaces the mechanical process of manual HDL code editing with an automated software-based configuration system. Instead of requiring designers to directly manipulate hardware description language files and compile them for emulation, the system uses automated tools that generate configuration bitstreams directly from the design description, substituting the manual mechanical process with an automated software intermediary.
2Adaptability or versatility
If the simulation environment is configured to interface with programmable logic circuitry, then hardware emulation is enabled, but the device complexity increases due to additional configuration requirements
Solution Approach 1:
The patent implements a universal configuration interface that handles multiple types of programmable logic devices (FPGAs, CPLDs, etc.) through a single unified system. The simulation environment uses a standardized interface that can adapt to different hardware platforms automatically, eliminating the need for separate configuration procedures for each device type. This multi-functional approach maintains hardware emulation capability while reducing configuration complexity through standardization.
Solution Approach 2:
The patent performs preliminary configuration actions by pre-generating and storing configuration bitstreams in a library before actual emulation runs. The system automatically selects appropriate pre-configured bitstreams based on the target hardware platform and design requirements, eliminating the need for real-time configuration generation during simulation. This preliminary preparation reduces the operational complexity of setting up hardware emulation environments.
3Reliability
If module instances are compiled into separate simulation and emulation models, then concurrent simulation and emulation is enabled, but the productivity decreases due to additional compilation and configuration steps
Solution Approach 1:
The patent segments the compilation process into parallel independent streams: one for software simulation model generation and another for hardware emulation model generation. Both streams process the same source HDL code simultaneously using different compilers/targets. This segmentation enables concurrent production of both simulation and emulation models without sequential dependency, maintaining high reliability through separate optimized compilation paths while improving productivity through parallel processing.
Solution Approach 2:
The patent uses parameter changes in the compilation process to adapt the same source code into different target formats. By changing compilation parameters (target architecture, optimization level, output format) rather than modifying source code, the system efficiently generates both simulation and emulation models from a single HDL source. This parameter-based adaptation maintains model accuracy while reducing setup time compared to manual configuration approaches.
Data Source
AI summary
Co-simulation platforms generally include a software-based system and a hardware-based system in which different portions of the circuit design are either simulated in a software-based system or emulated on a hardware-based system. Before a model of circuit design can be co-simulated, the circuit design must be transformed and configured into a form that can execute and interface with a specific hardware-based system. The embodiments of the present invention provide a method, system, and article of manufacture for co-simulation of a portion of a circuit design and achieve an advance in the art by improving co-simulation configuration and setup and providing co-simulation adjustment capabilities during runtime.