Co-verification of Hardware and Software Systems
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current methods for verifying hybrid systems comprising both hardware and software face challenges such as low coverage and human error in testing, as well as limitations in formal verification methods, which can lead to debugging issues and delayed product release.
Innovation Solution
A method involving the creation of a combined coverage model for both software and hardware, followed by co-simulation using instrumented software and hardware simulators to generate and iteratively improve test inputs, ensuring comprehensive coverage and reducing false positives.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate verification methods are used for hardware and software, then verification can be performed independently, but coverage is low and integration issues are missed
Solution Approach 1:
The patent merges hardware verification and software verification into a unified co-verification framework. The coverage model integrates both hardware coverage metrics and software coverage metrics, allowing simultaneous verification of both components and their interactions. This resolves the contradiction by combining separate verification processes to achieve comprehensive coverage while managing complexity through integrated automation.
Solution Approach 2:
The verification system is designed to perform multiple functions: it can verify hardware components, software components, and their integration points within a single framework. The coverage model universally applies to both hardware and software domains, enabling the system to adapt to different verification needs without requiring separate specialized processes.
2Measurement precision
If formal verification methods are used, then thorough analysis is achieved, but debugging issues and delays occur
Solution Approach 1:
The system implements feedback mechanisms where coverage information from both hardware and software verification is continuously collected and used to guide further verification activities. This feedback loop allows the system to focus on uncovered areas, improving precision efficiently without exhaustive formal verification of all components. The feedback-driven approach reduces time loss by directing resources to critical unverified areas.
Solution Approach 2:
The patent performs preliminary coverage analysis to identify which hardware and software components require verification before conducting detailed formal verification. This preliminary action filters out areas that are already covered or less critical, allowing formal verification to be applied selectively to reduce time loss while maintaining measurement precision for critical paths.
3Reliability
If comprehensive testing is performed on all system aspects, then coverage is maximized, but testing complexity and resource requirements increase
Solution Approach 1:
The verification system segments the coverage model into distinct hardware coverage metrics and software coverage metrics, allowing independent management and analysis of each domain. This segmentation enables comprehensive testing by breaking down the complex system into manageable verification units while maintaining overall coverage tracking. The segmented approach reduces testing system complexity by organizing verification tasks into structured, modular components.
Data Source
AI summary
An apparatus, a computer program product and a method for co-verification of systems comprising software and hardware components. The method comprises obtaining an over-approximation of the system that over-approximates the software or the hardware by using a non-deterministic version thereof; performing simulation of the over-approximation of the system; and utilizing an outcome of the simulation to guide a co-simulation of the system. The co-simulation comprises instrumenting the software to identify whether the coverage goals are reached during execution, generating a test input for the system, simulating execution of the test input by the instrumented software, wherein during said simulating, stimuli provided from the instrumented software to underlying hardware is provided to a hardware simulator that is configured to simulate the hardware-under-test; determining a coverage of the execution of the test input, and utilizing the coverage information in a successive iteration of the method.


