Active Region Isolation Structures for COAG RF Scaling Limits
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Solution Overview
Problem
The Contact Over Active Gate (COAG) process faces limitations in minimum channel length, leading to potential shorting of devices and an inverse relationship between Fmax and FT, where widening active regions improves Fmax but negatively affects FT.
Innovation Solution
The implementation of shallow trench isolation structures within active regions, allowing gate structures to overlap these isolation structures, thereby preventing shorting and maintaining high FT while improving Fmax, with a compact design similar to conventional COAG processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the channel length is reduced to enable aggressive scaling of standard cell height, then the space region between nMOS and pMOS devices is reduced, but the risk of shorting between gate contact and source/drain contact increases
Solution Approach 1:
The active region is segmented into multiple isolated regions by introducing shallow trench isolation structures. These isolation structures divide the continuous active region into separate segments, allowing gate contacts to be positioned over the active gate region without risking shorting to source/drain contacts, thus enabling aggressive scaling while maintaining reliability
Solution Approach 2:
Shallow trench isolation structures are introduced as intermediary elements between the gate contact and source/drain contact regions. These isolation structures act as mediators that prevent direct electrical contact between the gate and source/drain, eliminating the shorting risk while allowing the gate contact to overlap the active gate region
2Length of moving object
If the active region width is widened to improve Fmax, then Fmax is improved, but FT is negatively affected
Solution Approach 1:
The active region is configured with non-uniform width through the introduction of shallow trench isolation structures that create localized variations. This allows different portions of the active region to have different widths, enabling optimization of Fmax in wider regions while maintaining shorter channel lengths in other regions to preserve FT performance
Data Source
Figure 1A
Figure 1B~1C
Figure 2
AI summary
The present disclosure relates to semiconductor structures and, more particularly, to devices with isolation structures in active regions and methods of manufacture. The structure includes: an active region; a plurality of isolation structures (14) within the active region; a plurality of gate structures (16) overlapping the plurality of isolation structures within the active region; and diffusion regions on sides of the plurality of gate structures and the plurality of isolation structures.