COAG Trench Contact Structure for Low-Resistance Gate Scaling
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Solution Overview
Problem
The variability in conventional fabrication processes limits the possibility to further extend integrated circuits into the 10 nanometer node or sub-10 nanometer node range, particularly in forming reliable contacts to gate electrodes without wasting layout space or increasing transistor dimensions.
Innovation Solution
The implementation of contact over active gate (COAG) structures with trench contact layers, utilizing selective bilayer metals and epitaxial deposition, allows for self-aligned gate contact formation over active gate regions, reducing contact resistance and layout area by eliminating the need for separate gate contact layers and extending gate electrodes over isolation regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional fabrication processes are used, then manufacturing simplicity is maintained, but manufacturing precision deteriorates due to variability limiting extension into 10 nanometer node or sub-10 nanometer node range
Solution Approach 1:
The fabrication process is segmented into distinct stages: forming trenches in the interlayer dielectric, depositing trench contact layers with selective bilayer metals, forming gate electrodes, and creating gate contact structures. This segmentation allows each stage to be optimized independently for precision while managing overall process complexity.
Solution Approach 2:
Trench contact layers are formed preliminarily before gate electrode fabrication. This preliminary action establishes precise contact regions that guide subsequent gate electrode alignment, ensuring manufacturing precision at the 10 nanometer node and below without requiring complex real-time adjustment processes.
2Area of moving object
If separate gate contact layers are used, then ease of manufacture is maintained, but area of moving object increases due to wasted layout space
Solution Approach 1:
The gate contact structure is merged with the gate electrode itself by forming the gate contact over the active gate region. This merging eliminates the need for separate gate contact layers, reducing layout area while maintaining manufacturing simplicity through integrated process steps.
Solution Approach 2:
The gate electrode structure serves multiple functions: it acts as both the active gate component and the gate contact structure. This multi-functionality eliminates redundant elements, reducing layout area without complicating the manufacturing process.
3Productivity
If transistor dimensions are reduced, then productivity is improved through increased device density, but manufacturing precision deteriorates due to variability in conventional fabrication processes
Solution Approach 1:
The patent changes critical fabrication parameters including using selective bilayer metal deposition for trench contact layers, implementing specific etch selectivity ratios, and controlling film thicknesses at the nanometer scale. These parameter changes enable manufacturing precision to be maintained even as transistor dimensions are reduced for increased device density.
Solution Approach 2:
Trench contact layers serve as intermediary structures between the interlayer dielectric and the gate electrode. These intermediaries provide controlled interfaces that maintain manufacturing precision during scaling, enabling higher device density without sacrificing fabrication quality.
4Area of moving object
If gate contacts are formed over inactive gate portions, then ease of manufacture is maintained, but area of moving object increases due to layout space waste
Solution Approach 1:
Instead of forming gate contacts over inactive gate portions as conventionally done, the patent inverts the approach by forming gate contacts over active gate regions. This inversion requires trenches to be formed through the interlayer dielectric to expose the active gate, achieving area reduction while maintaining manufacturing simplicity through the self-aligned nature of the process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the fabrication of advanced integrated circuits by reducing contact resistance and layout area, enabling efficient integration of gate contacts over active gate regions without shorting to adjacent source or drain regions, thus supporting further scaling and performance improvements.
Implementation Method 1
utilizing selective bilayer metals and epitaxial deposition
Data Source
AI summary
Contact over active gate (COAG) structures with trench contact layers, and methods of fabricating contact over active gate (COAG) structures using trench contact layers, are described. In an example, an integrated circuit structure includes a gate structure. An epitaxial source or drain structure is adjacent to the gate structure. A conductive trench contact structure is on the epitaxial source or drain structure. The conductive trench contact structure includes a first planar layer on the epitaxial source or drain structure, a second planar layer on the first planar layer, and a conductive fill material on the second planar layer.