Co-axial BGA Interconnect for Crosstalk Reduction

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Solution Overview

Problem

Conventional semiconductor packages with small solder ball-grid-array (BGA) pitch dimensions suffer from increased crosstalk coupling for high-speed I/O signals, leading to package footprint expansion and inhibited miniaturization, especially for signals above 20 Gbps.

Innovation Solution

The implementation of a semiconductor package with a co-axial BGA interconnect design, where a solder ball is surrounded by a conductive wall and metal shield, reducing the need for stacked or staggered micro-vias and minimizing crosstalk by directly connecting to inner PCB layers, and repurposing Vss BGAs as signal BGAs to reduce footprint.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the solder ball-grid-array (BGA) pitch dimension is reduced to achieve package footprint reduction, then the package area is reduced, but the crosstalk coupling increases significantly for high-speed I/O signals

Engineering Contradiction:
Improvepackage footprintVSAvoidcrosstalk coupling
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

A co-axial conductive structure comprising a conductive wall and a metal shield is introduced as an intermediary between adjacent solder balls. The conductive wall is positioned between neighboring solder balls and the metal shield surrounds the solder ball, creating a shielding barrier that reduces electromagnetic coupling between adjacent high-speed signal paths while maintaining the reduced pitch dimension

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The shielding structure is applied locally around each high-speed I/O solder ball rather than uniformly across the entire package. The co-axial configuration with conductive wall and metal shield creates localized electromagnetic isolation zones around critical signal paths, reducing crosstalk without requiring blanket shielding that would increase overall package size

Inventive Principle:
Principle #3Local quality

2Object-affected harmful factors

If more Vss BGAs are introduced to serve as shielding and current return path for high-speed I/O signals, then the crosstalk coupling is reduced, but the package footprint and platform form-factor expand

Engineering Contradiction:
Improvecrosstalk couplingVSAvoidpackage footprint
Core Design Contradiction:
Object-affected harmful factorsVSArea of stationary object

Solution Approach 1:

The co-axial conductive structure serves multiple functions simultaneously: the conductive wall and metal shield provide electromagnetic shielding to reduce crosstalk, while also serving as current return paths for the high-speed signals. This multi-functionality eliminates the need for separate dedicated ground BGAs, reducing their number by up to 30% while maintaining shielding effectiveness

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The shielding function and current return path function are merged into the same co-axial conductive structure. The conductive wall and metal shield that provide electromagnetic isolation also conduct the return current, combining what were previously separate functions performed by distinct ground BGAs into an integrated structure around each signal ball

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11284518B1Semiconductor package with co-axial ball-grid-array
Publication Date: 2022.03.22 INTEL CORP
  • US11284518B1 patent drawing
  • US11284518B1 patent drawing
  • US11284518B1 patent drawing

AI summary

According to various examples, a device is described. The device may include a printed circuit board. The device may also include a first recess in the printed circuit board, wherein the first recess comprises a circular side surface and a bottom surface. The device may also include a first solder ball disposed in the first recess. The device may also include a first conductive wall positioned behind the circular side surface of the first recess, wherein the first conductive wall surrounds a side surface of the first solder ball.