Coaxial Contacts for 3D Logic and Memory Stacking
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Solution Overview
Problem
The challenge in semiconductor manufacturing is achieving high transistor density in 3D integrated circuits due to limitations in contacted gate pitch scaling, resistance, capacitance, and reliability concerns, which hinder the effective wiring of transistors in 3D circuits.
Innovation Solution
The implementation of a coaxial contact structure that selectively connects individual levels in a device-stack to corresponding metal layers without requiring a stair-cased formation, using concentrically arranged conductive and insulating layers to facilitate vertical stacking and reduce lithographic resolution and placement limits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional 2D circuit layout is used, then manufacturing process is simple, but transistor density is limited due to contacted gate pitch scaling limits
Solution Approach 1:
The patent transitions from 2D circuit layout to 3D vertical stacking architecture. Multiple transistor layers are stacked vertically with conductive layers connecting different levels, enabling increased transistor density by utilizing the third dimension (vertical space) rather than only horizontal plane expansion.
2Quantity of substance
If vertical stacking is implemented to increase transistor density, then transistor density improves, but wiring complexity increases due to resistance and capacitance concerns
Solution Approach 1:
The wiring system is segmented into multiple conductive layers at different vertical levels. Each conductive layer is selectively connected to specific transistor layers through the coaxial contact structure, allowing optimized signal routing and reduced interference between different wiring levels, thereby maintaining wiring performance while enabling vertical stacking.
3Measurement precision
If coaxial contact structure is used, then lithographic resolution limits are reduced, but manufacturing precision requirements increase
Solution Approach 1:
The coaxial contact structure employs nested concentric conductive layers (first conductive layer, second conductive layer, third conductive layer) where each layer is positioned within or around the previous layer. This nested configuration allows multiple interconnect functions to be integrated within a single vertical contact footprint, improving lithographic resolution by eliminating the need for separate alignment of multiple contact holes while maintaining precise electrical connections through the concentric arrangement.
Data Source
AI summary
In method for forming a semiconductor device, a first opening is formed in a dielectric stack that has a cylinder shape with a first sidewall. A first conductive layer is deposited along the first sidewall of the first opening and a first insulating layer is deposited along an inner sidewall of the first conductive layer. The dielectric stack is then etched along an inner sidewall of the first insulating layer so as to form a second opening that extends into the dielectric stack with a second sidewall. A second conductive layer is further formed along the second sidewall of the second opening and a second insulating layer is formed along an inner sidewall of the second conductive layer. A bottom of the second conductive layer is positioned below a bottom of the first conductive layer to form a staggered configuration.