Coaxial Via Posts for High-Density Interconnects
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Solution Overview
Problem
The 'drill & fill' method for creating vias in IC substrates and interposers is limited by low throughput, high costs, difficulty in producing high-density vias of varying sizes and shapes, rough laser-drilled via walls, and challenges in uniform copper filling, which affects electrical reliability and stackability.
Innovation Solution
The development of a multilayer composite electronic structure featuring coaxial via posts with a central post surrounded by a torroidal post separated by a dielectric material, fabricated using pattern or panel plating and laminating techniques, allowing for the deposition of copper via posts in a dielectric matrix with alternating layers, enabling precise control of dimensions and electrical insulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If laser drilling is used to create vias, then via channels can be formed quickly, but the via walls become rough and tapered, reducing manufacturing precision and electrical reliability
Solution Approach 1:
The patent replaces the mechanical laser drilling process with a chemical etching process. Instead of using laser energy to physically remove material and create via channels, the invention uses chemical etchants to selectively remove dielectric material, forming smooth-walled via channels without the tapering and roughness problems inherent in laser drilling.
Solution Approach 2:
The patent changes the fundamental parameter of via formation from mechanical/thermal removal (laser) to chemical removal (etching). This parameter change transforms the via wall quality from rough and tapered to smooth and uniform, while maintaining high productivity through batch processing capabilities.
2Length of stationary object
If drill & fill method is used, then vias can be created through thick dielectric layers, but the throughput rate is limited and fabrication costs become prohibitive
Solution Approach 1:
The patent merges multiple individual via drilling operations into a single batch chemical etching process. Instead of drilling each via separately through thick dielectric layers, the invention applies a chemical etchant that simultaneously creates multiple via channels across the entire substrate, dramatically increasing throughput while maintaining the ability to penetrate thick dielectric layers.
Solution Approach 2:
The patent performs preliminary patterning of the dielectric layer to define via locations before chemical etching. This preliminary action allows the subsequent batch etching process to efficiently create multiple vias simultaneously at predetermined locations, maximizing throughput for thick dielectric layer penetration.
3Quantity of substance
If high density of vias with different sizes and shapes is required, then the drill & fill methodology struggles to produce quality vias in close proximity
Solution Approach 1:
The patent applies local quality by using photoresist masking to define different via geometries at different locations before batch chemical etching. This allows each via region to have locally optimized dimensions and shapes while being processed simultaneously in a single batch operation, maintaining high density and quality consistency.
4Reliability
If copper electroplating is used to fill drilled via holes, then via channels can be filled with conductive material, but dimpling and overfill occur, creating difficulties for subsequent stacking
Solution Approach 1:
The patent performs preliminary chemical etching to create via channels with smooth, uniform walls and precise dimensions before any metal filling. This preliminary action ensures that subsequent copper electroplating fills the via channels uniformly without creating dimpling or overfill, as the etched via walls provide consistent nucleation sites for copper deposition.
Solution Approach 2:
The patent changes the via formation mechanism from mechanical drilling to chemical etching, which produces via channels with smooth walls and controlled geometry. This parameter change eliminates the rough, tapered walls that cause non-uniform copper plating, thereby preventing dimpling and overfill while maintaining electrical conductivity.
5Ease of manufacture
If laser drilling creates rough via walls in composite dielectric materials, then via channels can be formed, but stray inductances increase, adversely affecting electrical performance
Solution Approach 1:
The patent replaces the mechanical/thermal laser drilling system with a chemical etching system. This substitution eliminates the rough via walls and associated stray inductances by using chemical reactions to remove dielectric material, resulting in smooth via walls that minimize electromagnetic interference and improve electrical performance while maintaining ease of manufacture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of high-density, reliable interconnects with controlled dimensions and reduced inductance, facilitating higher data transfer rates and improved stackability, while minimizing warping and enhancing planarity, thus overcoming the limitations of traditional drill & fill methods.
Implementation Method 1
exposing the photoresist to form a negative pattern
Implementation Method 2
a layer of metal is deposited into the negative pattern created in the photoresist using a technology otherwise known as pattern plating
Data Source
AI summary
A multilayer electronic structure comprising a plurality of dielectric layers extending in an X-Y plane and comprising at least one coaxial pair of stacked posts extending through at least one dielectric layer in a Z direction that is substantially perpendicular to the X-Y plane, wherein the coaxial pair of stacked via posts comprises a central post surrounded by a torroidal via post separated from the central post by a separating tube of dielectric material.