Cobalt Feature Fill via CVD and PVD Reflow
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Solution Overview
Problem
Cobalt deposition in semiconductor features faces challenges such as increased interface resistance due to titanium/titanium nitride barriers, void formation during chemical vapor deposition, and limitations in anneal temperatures that prevent complete removal of micro-voids, hindering the scaling of interconnects and contact applications.
Innovation Solution
A method combining chemical vapor deposition (CVD) and physical vapor deposition (PVD) processes to deposit cobalt, where a plasma process in a PVD chamber reflows a cobalt layer into features, enhancing density and purity while reducing resistivity, and optionally using an underlayer to improve adherence and fill quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conformal cobalt fill by chemical vapor deposition (CVD) is used, then the feature filling is improved, but voids and micro-voids are formed in the feature
Solution Approach 1:
The cobalt fill process is divided into multiple sequential steps: initial CVD deposition, annealing, PVD reflow, and additional CVD deposition. This segmentation allows each step to address specific aspects of the filling problem, with the PVD reflow step specifically targeting void removal through controlled material redistribution
Solution Approach 2:
The invention changes the deposition parameters by switching between CVD and PVD modes, and by controlling the annealing temperature and duration. The PVD reflow step uses specific power density and deposition rate parameters to achieve controlled material flow that eliminates voids while maintaining fill quality
2Object-generated harmful factors
If aggressive anneal process (higher temperatures and longer anneal times) is used to remove micro-voids, then micro-void removal is improved, but the dielectric materials on the substrate are damaged due to limited anneal temperature tolerance
Solution Approach 1:
The PVD reflow process acts as an intermediary mechanism that enables void removal without requiring aggressive thermal annealing. By using physical vapor deposition with controlled reflow, the process achieves void elimination through material redistribution at lower temperatures that are safe for dielectric materials
Solution Approach 2:
The invention replaces the thermal-mechanical annealing process with a plasma-based PVD reflow process. Instead of relying on high temperature thermal diffusion to remove voids, the PVD process uses plasma-enhanced physical vapor deposition to achieve controlled material flow and void elimination at lower temperatures
3Ease of manufacture
If Ti/TiN barrier is used in tungsten contacts, then contact formation is improved, but interface resistance increases and downward scaling of features is limited
Solution Approach 1:
The invention changes the material parameter from traditional Ti/TiN barrier to cobalt-based fill, which enables better interface characteristics and lower resistance. The cobalt deposition parameters (CVD followed by PVD reflow) are optimized to achieve complete fill without voids, enabling scaling to smaller dimensions while maintaining low interface resistance
4Ease of manufacture
If copper vias with barrier/liner are used, then via formation is improved, but interface resistance increases and via resistance scaling is negatively impacted
Solution Approach 1:
The invention changes the material system from copper with barrier/liner to direct cobalt deposition. The cobalt fill process parameters (CVD initial deposition followed by PVD reflow with controlled power density and deposition rate) are optimized to achieve complete via fill with low interface resistance, enabling effective resistance scaling without the need for additional barrier layers
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in cobalt-filled features with lower resistivity and improved roughness, achieving 5 to 8 times lower metal line resistance than tungsten and over 45% via resistance reduction compared to copper, while avoiding voids and micro-voids, thus enabling effective scaling at the 7 nm node.
Implementation Method 1
depositing a first cobalt layer via a chemical vapor deposition (CVD) process atop a substrate and within a feature disposed in the substrate
Implementation Method 2
at least partially filling the feature with cobalt by performing a plasma process in a physical vapor deposition (PVD) chamber having a cobalt target to reflow a portion of the first cobalt layer into the feature
Implementation Method 3
performing a plasma process in a physical vapor deposition (PVD) chamber
Data Source
AI summary
Methods and apparatus for filling features with cobalt are provided herein. In some embodiments, a method for processing a substrate includes: depositing a first cobalt layer via a chemical vapor deposition (CVD) process atop a substrate and within a feature disposed in the substrate; and at least partially filling the feature with cobalt or cobalt containing material by performing a plasma process in a physical vapor deposition (PVD) chamber having a cobalt target to reflow a portion of the first cobalt layer into the feature. The PVD chamber may be configured to simultaneously deposit cobalt or cobalt containing material within the feature from a cobalt target disposed in the PVD chamber.