Cobalt Plated Via Integration Scheme for Semiconductor Interconnects
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As technology nodes scale down, copper interconnect structures in integrated circuits face challenges such as electromigration-induced failures and difficulties in filling metal vias, leading to void formation and reduced device performance.
Innovation Solution
A cobalt-plated via integration scheme is introduced, where cobalt material is used to fill vias and line wiring structures, potentially with a barrier liner, to improve electromigration resistance and void prevention, utilizing techniques like atomic layer deposition and electroplating for precise filling and lining.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If copper interconnect structures are used, then electrical conductivity is improved, but electromigration resistance deteriorates
Solution Approach 1:
The patent changes the material parameter from copper to cobalt in the via structures, fundamentally altering the electrical and mechanical properties to achieve better electromigration resistance while maintaining conductivity requirements for the interconnect system
Solution Approach 2:
The patent creates a composite interconnect structure combining cobalt via plugs with copper wiring, where each material is used in the location where it provides optimal performance - cobalt for electromigration resistance in vias, copper for conductivity in wiring
2Manufacturing precision
If conventional deposition of TaN/Ta liner and Cu fill is used beyond 10 nm node, then manufacturing process is simplified, but via filling quality deteriorates
Solution Approach 1:
The patent applies preliminary cobalt deposition and electroplating to line the via walls before final copper filling, ensuring that the via structure is properly prepared and lined to prevent void formation during subsequent filling operations
Solution Approach 2:
The patent introduces cobalt as an intermediary material between the via wall and the copper fill, where the cobalt layer serves as a mediating layer that improves adhesion and prevents void formation during copper deposition
3Reliability
If via fill is not properly controlled, then manufacturing process is faster, but void formation increases
Solution Approach 1:
The cobalt electroplating process is self-regulating, where the cobalt automatically deposits on available surfaces including via walls and wiring structures, ensuring uniform coverage without requiring complex external control mechanisms
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The cobalt-plated via integration scheme significantly reduces early electromigration failures and void formation, enhancing the reliability and performance of back-end-of-line technologies by providing improved filling capabilities and reducing gap formation in interconnect structures.
Implementation Method 1
utilizing techniques like atomic layer deposition and electroplating for precise filling and lining
Implementation Method 2
utilizing techniques like atomic layer deposition and electroplating for precise filling and lining
Data Source
AI summary
The present disclosure relates to semiconductor structures and, more particularly, to a cobalt plated via integration scheme and methods of manufacture. The structure includes: a via structure composed of cobalt material; and a wiring structure above the via structure. The wiring structure is lined with a barrier liner and the cobalt material and filled with conductive material.