Code-Assisted Error Detection for Burst and Single-Bit Faults

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Solution Overview

Problem

Existing error detection methods in communication systems are inadequate in detecting burst errors affecting multiple bits or symbols, leading to high miss-detection probabilities, especially when combined with error-detection codes that focus on single-bit errors.

Innovation Solution

The integration of coding constraints, such as Dynamic-Bus-Inversion (DBI) encoding, with error-detection and correction codes to identify and correct both burst errors and single-bit errors by generating and comparing error-detection information, facilitating probabilistic determination and remedial action.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If error-detection codes (such as CRC) are used to detect single-bit errors, then detection capability for single-bit errors is improved, but miss-detection probability for burst errors increases

Engineering Contradiction:
Improveerror detection capabilityVSAvoidmiss-detection probability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent combines coding constraints (such as DBI encoding rules) with error-detection codes (such as CRC) to create a hybrid error detection mechanism. The coding constraints check for violations of encoding rules while CRC provides probabilistic error detection, together covering both single-bit and burst errors more effectively than either method alone.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent creates a composite error detection system that integrates two different detection approaches: deterministic coding constraint verification and probabilistic CRC checking. This composite approach leverages the strengths of both methods to achieve more reliable error detection across different error types.

Inventive Principle:
Principle #40Composite materials

2Measurement precision

If coding constraints (such as DBI encoding) are used to detect burst errors, then detection capability for burst errors is improved, but overall error detection coverage for single-bit errors deteriorates

Engineering Contradiction:
Improveburst error detection capabilityVSAvoidsingle-bit error detection coverage
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent merges coding constraint verification with CRC error detection to create a comprehensive error detection system. The coding constraints effectively detect burst errors by identifying violations of encoding rules, while CRC provides additional coverage for single-bit and other error patterns, achieving complementary error detection coverage.

Inventive Principle:
Principle #5Merging (Combining)

3Device complexity

If only error-detection codes are used without coding constraints, then system complexity is reduced, but error detection performance deteriorates

Engineering Contradiction:
Improveerror detection system complexityVSAvoiderror detection performance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent segments the error detection function into two independent but complementary components: coding constraint verification and CRC error detection. This segmentation allows each component to be optimized for its specific error detection strength while maintaining manageable individual complexities, with the combined system achieving superior overall performance.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8943382B2Code-assisted error-detection technique
Publication Date: 2015.01.27 RAMBUS INC
  • US8943382B2 patent drawing
  • US8943382B2 patent drawing
  • US8943382B2 patent drawing

AI summary

A circuit, wherein an encoder circuit encodes a set of N symbols as a given codeword in a code space, where the given codeword includes a set of M symbols. M drivers are coupled to the encoder circuit and are coupled to M links in a channel, where a given driver outputs a given symbol in the set of M symbols onto a given link. An error-detection circuit coupled to the encoder circuit generates and stores error-detection information associated with the set of M symbols, facilitating subsequent probabilistic determination of a type of error during communication of the set of M symbols to another circuit. A receiver circuit receives feedback information from the other circuit, which includes error information about detection of another type of error in the set of M symbols based on characteristics of the code space. Control logic performs remedial action based on the feedback information.