Code Bit Level Redundancy for Railway Interlocking Systems

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Solution Overview

Problem

Current computer interlocking systems in railways face inefficiencies due to the inability of dual subsystems to maintain system functionality when both encounter malfunctions, leading to compromised reliability and potential train shutdowns, especially in large-scale stations with frequent malfunctions in relay circuit terminal blocks.

Innovation Solution

A code bit level redundancy method that controls output in parallel and shares collected information between working and standby subsystems, ensuring safety by synchronizing outputs and information sharing under various conditions, including synchronization checks, communication status, and manual switching, to prevent sudden shutdowns and interference impacts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dual subsystems are used with traditional working-standby mechanism, then system reliability is improved through redundancy, but system efficiency deteriorates when both subsystems encounter malfunctions

Engineering Contradiction:
Improvesystem reliabilityVSAvoidsystem efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements dynamic output switching between working and standby subsystems based on real-time synchronization status and malfunction detection. The system dynamically adjusts which subsystem provides output - sometimes working, sometimes standby, sometimes both in parallel - to maintain efficiency while preserving reliability through redundancy.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the operational parameter of output provision from static (fixed working-standby assignment) to dynamic (conditional switching based on synchronization and malfunction status). This allows the system to adapt to different operational states and maintain both reliability and efficiency.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If both subsystems collect information independently, then system reliability is improved through redundancy, but information sharing efficiency deteriorates

Engineering Contradiction:
Improvesystem reliabilityVSAvoidinformation sharing efficiency
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent merges the information collection efforts of both working and standby subsystems by enabling them to share collected information. This allows both subsystems to maintain independent collection capabilities for reliability while combining their information resources through sharing mechanisms, improving overall information efficiency.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The collected information serves multiple functions - it is used by both the working subsystem for current operations and the standby subsystem for synchronization and potential takeover. This multi-functional use of information maximizes the value of collected data while maintaining system reliability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Device complexity

If only the working subsystem provides output, then system simplicity is maintained, but system reliability deteriorates when the working subsystem malfunctions

Engineering Contradiction:
Improvesystem simplicityVSAvoidsystem reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The standby subsystem performs preliminary synchronization with the working subsystem during normal operation, maintaining readiness to take over. This preliminary action ensures that when a malfunction occurs, the standby subsystem can immediately assume the output function without disruption, maintaining reliability while keeping the system structure relatively simple.

Inventive Principle:
Principle #10Preliminary action

4Productivity

If parallel output is provided by both subsystems, then system efficiency is improved, but system safety deteriorates due to potential output conflicts

Engineering Contradiction:
Improvesystem efficiencyVSAvoidsystem safety
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system implements feedback mechanisms through synchronization checks that continuously monitor the consistency between working and standby subsystem outputs. When synchronization is maintained, both subsystems can provide output in parallel for improved efficiency. When synchronization is lost, the feedback triggers switching to prevent conflicts, thereby maintaining safety.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8620497B2Computer interlocking system and code bit level redundancy method therefor
Publication Date: 2013.12.31 CASCO SIGNAL LTD
  • US8620497B2 patent drawing
  • US8620497B2 patent drawing
  • US8620497B2 patent drawing

AI summary

A code bit level redundancy method for a computer interlocking system is provided. The method includes: (1) controlling the output in parallel, and (2) sharing the collected information.