Code Block CRC Generation for Reliable LTE Transport Decoding
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Solution Overview
Problem
In wireless communication systems, particularly in 3GPP LTE, when a transport block is segmented into multiple code blocks, the current method of generating a single 24-bit cyclic redundancy check (CRC) for the whole transport block is inadequate, leading to incorrect decoding of some code blocks during transmission, resulting in non-acknowledgement (NAK) feedback from the receiver.
Innovation Solution
The method involves calculating multiple CRCs for each code block, allowing at least one CRC to be based on a subset of information bits, and using forward error correcting codes like turbo codes to encode both the subset and CRC, enabling error detection and correction for each code block independently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single 24-bit CRC is generated for the whole transport block, then the hardware complexity is reduced, but the error detection capability for individual code blocks deteriorates
Solution Approach 1:
The patent divides the transport block into multiple code blocks and generates separate CRC checks for each code block. This segmentation allows independent error detection for each code block, improving reliability while maintaining reasonable hardware complexity through modular design.
Solution Approach 2:
The patent applies different CRC generation approaches to different code blocks based on their specific characteristics. Some code blocks use full CRC generation while others use differential CRC generation, optimizing the balance between error detection capability and hardware complexity for each local segment.
2Reliability
If multiple CRCs are generated for each code block, then the error detection capability is improved, but the transmitter complexity increases
Solution Approach 1:
The patent uses differential encoding for CRC generation in some code blocks, which is a partial action approach. Instead of fully re-generating CRC for each code block, it only encodes the differential changes, reducing transmitter complexity while maintaining error detection capability.
Solution Approach 2:
The patent performs preliminary CRC generation for the first code block and then uses differential encoding for subsequent code blocks. This preliminary action establishes a baseline that simplifies subsequent CRC generation processes, reducing overall transmitter complexity.
3Reliability
If multiple CRCs are generated for each code block, then the error detection capability is improved, but the processing time increases
Solution Approach 1:
The patent enables continuous CRC generation across multiple code blocks using differential encoding. The CRC process continues seamlessly from one code block to the next without complete re-initialization, reducing processing time while maintaining error detection for all code blocks.
Solution Approach 2:
By using differential CRC generation for subsequent code blocks, the patent performs only the necessary partial encoding operations rather than complete CRC generation for each block, significantly reducing processing time while maintaining error detection capability.
4Measurement precision
If iterative decoding is performed for each code block, then the decoding accuracy is improved, but the power consumption increases
Solution Approach 1:
The patent uses CRC check results as feedback to determine whether iterative decoding is necessary for each code block. If the CRC check passes, iterative decoding is skipped; if it fails, iterative decoding is performed. This feedback mechanism maintains decoding accuracy while reducing unnecessary power consumption.
Solution Approach 2:
The patent applies iterative decoding only when necessary, based on CRC check results, rather than performing it for all code blocks unconditionally. This partial application of iterative decoding maintains accuracy for problematic code blocks while avoiding excessive power consumption for correctly decoded blocks.
Data Source
AI summary
A method and a circuit for generating cyclic redundancy checks. The method calculates a plurality of cyclic redundancy checks for a transport block with a plurality of information bits. At least one cyclic redundancy check among the plurality of cyclic redundancy checks is calculated based on a subset of information bits, and at least one information bit among the plurality of information bits is not within said subset of the information bits. In addition, a transport block cyclic redundancy check may be calculated based on all the information bits.