Code Block CRC Segmentation for Early LTE Decoding Checks
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Solution Overview
Problem
In wireless communication systems, particularly in 3GPP LTE, when a transport block is segmented into multiple code blocks, the current method of generating a single 24-bit cyclic redundancy check (CRC) for the whole transport block fails to accurately detect errors for each code block, leading to incorrect decoding and non-acknowledgement feedback from receivers.
Innovation Solution
The method involves generating multiple CRCs for each code block, allowing for error detection and correction at the code block level, reducing decoding complexity and latency, and enabling early stopping of iterative decoding processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single 24-bit CRC is generated for the whole transport block, then the hardware complexity is reduced, but the error detection accuracy for individual code blocks deteriorates
Solution Approach 1:
The patent applies segmentation by dividing the single transport block CRC into multiple code block-level CRCs. Each code block is assigned its own CRC check, allowing independent error detection for each segment. This resolves the contradiction by maintaining low overall complexity while improving per-code-block error detection accuracy, as the receiver can now detect errors in individual code blocks rather than having to decode the entire transport block to verify a single CRC.
Solution Approach 2:
The patent implements local quality by providing differentiated error detection capability at the code block level. Instead of uniform error detection for the entire transport block, each code block receives tailored CRC protection. This allows the system to maintain acceptable overall complexity while achieving high error detection accuracy where it is most needed - at the individual code block level for parallel processing and early stopping.
2Measurement precision
If multiple CRCs are generated for each code block, then the error detection accuracy improves, but the transmitter and receiver complexity increases
Solution Approach 1:
The patent segments the CRC generation and verification process into independent code block-level operations. Each code block is processed with its own CRC, enabling parallel processing at the transmitter and receiver. This segmentation reduces the computational burden on individual processing units compared to a single large CRC, thereby managing complexity while improving error detection accuracy.
Solution Approach 2:
The patent applies preliminary action by generating CRCs for each code block before transmission and storing them separately. At the receiver side, CRC verification is performed preliminarily on individual code blocks before full decoding attempts. This preliminary error detection prevents wasted processing on corrupted code blocks, reducing overall receiver complexity despite the presence of multiple CRCs.
3Loss of time
If a single CRC is used for the transport block, then the decoding process must complete fully before error detection, but this increases the decoding latency
Solution Approach 1:
The patent segments the decoding process into independent code block units, each with its own CRC. This allows the receiver to perform preliminary CRC checks on individual code blocks before committing to full decoding. If a code block fails the CRC check, decoding can be stopped early for that block, significantly reducing the average decoding latency while maintaining high throughput through parallel processing of multiple code blocks.
Solution Approach 2:
The patent enables skipping of full decoding processes for code blocks that fail preliminary CRC checks. Instead of completing the full decoding pipeline for every code block, the system rapidly identifies and skips corrupted blocks using their individual CRCs. This rushing through of error detection allows the system to maintain high productivity by quickly moving past erroneous data while preserving low latency for correct code blocks.
4Productivity
If code blocks are processed in parallel, then the productivity increases, but the requirement for multiple CRCs increases the device complexity
Solution Approach 1:
The patent segments both the data and the error detection mechanism into parallelizable code block units. Each code block with its associated CRC forms an independent processing unit that can be handled separately. This segmentation enables true parallel processing at the transmitter (generating multiple CRCs simultaneously) and at the receiver (verifying multiple CRCs independently), increasing productivity while keeping individual processing unit complexity manageable.
Solution Approach 2:
The patent applies universality by using the same CRC algorithm and verification logic for each code block. The same hardware or software module that generates and verifies a single CRC can be replicated or time-multiplexed to handle multiple code blocks. This multi-functional approach allows parallel processing capability to be achieved without proportionally increasing device complexity, as the same proven CRC mechanism serves multiple code blocks.
Data Source
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AI summary
A method and a circuit for generating cyclic redundancy checks. The method calculates a plurality of cyclic redundancy checks for a transport block with a plurality of information bits. A transport block CRC is calculated for a transport block including a plurality of information bit. A transport block including the transport block CRC is segmented into a plurality of subsets and a plurality of cyclic redundancy checks are calculated for the plurality of subsets. At least one cyclic redundancy check among the plurality of cyclic redundancy checks is calculated based on a subset of information bits. In addition, a transport block cyclic redundancy check may be calculated based on all the information bits.