Code Block Segmentation for Concatenated Turbo-RS Coding

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Wireless cellular networks face challenges in achieving low Block Error Rate (BLER) and low latency in backhaul links due to the error floor of turbo codes in high Signal-to-Noise Ratio (SNR) environments, which traditional turbo coding alone cannot overcome.

Innovation Solution

Concatenating Reed-Solomon (RS) codes with turbo codes as an outer code to form a Forward Error Correction (FEC) system, utilizing a symbol interleaver to disperse errors across multiple RS blocks, and employing flexible FEC segmentation and configuration to optimize error correction capabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional turbo coding is used alone, then the system is simple to implement, but it cannot achieve low BLER in high SNR environments due to error floor

Engineering Contradiction:
ImproveBlock Error RateVSAvoidcoding system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the turbo code into multiple constituent encoders (first and second constituent encoders) with different generator polynomials. This segmentation allows each encoder to handle specific parts of the code blocks, improving error correction capability in high SNR environments while maintaining manageable complexity through modular design

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a composite coding system by combining multiple turbo code constituent encoders with different generator polynomials (e.g., (133,171) and (155,171)) and integrating them with specific interleavers (QPP, RPP, or custom). This composite structure leverages the strengths of different polynomial configurations to achieve BLER below 10^-6 in high SNR conditions

Inventive Principle:
Principle #40Composite materials

2Reliability

If concatenated RS and turbo coding is implemented, then error correction capability is significantly improved, but the device complexity increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidcoding system structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides code blocks into multiple segments and assigns them to different constituent encoders. Each segment is processed by a specific encoder configuration, allowing the system to handle large code blocks efficiently while maintaining low complexity per encoder unit

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic selection of interleaver types (QPP, RPP, or custom) and generator polynomial configurations based on channel conditions and code block size. This dynamic adaptation optimizes error correction performance for different scenarios without requiring a fixed complex structure for all cases

Inventive Principle:
Principle #15Dynamics

3Reliability

If code blocks are segmented into multiple FEC blocks, then error floor is reduced, but the processing complexity increases

Engineering Contradiction:
Improveerror floor performanceVSAvoidsegmentation processing
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments each code block into multiple FEC blocks (e.g., 2-8 segments per code block) and processes them through different constituent encoders. This segmentation reduces the error floor by ensuring that errors in one segment do not propagate to others, while the modular processing keeps complexity manageable

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different generator polynomials and interleaver configurations to different FEC blocks based on their specific characteristics and position in the code block. This local optimization ensures that each segment is processed with the most appropriate parameters, improving overall error floor performance without uniform complexity increase

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20260039414A1Code Block Segmentation and Configuration for Concatenated Turbo and RS Coding
Publication Date: 2026.02.05 TEXAS INSTRUMENTS INC
  • US20260039414A1 patent drawing
  • US20260039414A1 patent drawing
  • US20260039414A1 patent drawing

AI summary

A user equipment (UE) comprises one or more processors and one or more computer-readable storage media coupled to the one or more processors. The one or more computer-readable storage media store instructions that, when executed by the one or more processors, cause the one or more processors to perform operations comprising: receiving a transport block of data to be transmitted; obtaining modulation and coding scheme (MCS) parameters for the transport block of data; dividing the transport block of data into a plurality of segments; encoding the plurality of segments using inner and outer error control codes based on the MCS parameters; modulating the encoded plurality of segments to produce symbols; and transmitting, via the transmitter, the symbols using one or more resource elements.