Audio Codec Controller Capture Register for Multichannel Data Transfer

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Solution Overview

Problem

In audio codec systems, managing data transfer in multichannel configurations is complex and costly due to the need for intricate hardware circuitry to handle output FIFO buffers and AC-link interfaces, especially in 6-channel setups.

Innovation Solution

An audio codec controller with a capture register that buffers and temporarily stores data requested by the audio codec, allowing for efficient packet-oriented data transfer over the AC-link without modifying the existing FIFO controller, enabling flexible data ordering and access in various channel configurations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If complicated hardware circuitry is provided in the AC-link interface controller for accessing the output FIFO buffer in multichannel configurations, then data transfer capability is improved, but device complexity and manufacturing cost increase significantly

Engineering Contradiction:
Improvedata transfer capabilityVSAvoidcircuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces a capture register as an intermediary component between the output FIFO buffer and the AC-link interface controller. This capture register temporarily stores data from the FIFO buffer, allowing the AC-link interface controller to access data without requiring complicated hardware circuitry for direct FIFO access. The intermediary buffer decouples the complex multichannel data transfer requirements from the interface controller, simplifying its design while maintaining full data transfer capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If separate channels are provided for each audio channel in 6-channel configurations, then audio quality is improved, but the handling complexity of the output FIFO buffer increases

Engineering Contradiction:
Improveaudio qualityVSAvoidFIFO handling complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the data handling process by introducing a capture register that temporarily holds data from the output FIFO buffer. This segmentation allows the system to maintain separate channel data integrity (improving audio quality) while decoupling the FIFO buffer handling complexity from the AC-link interface controller. The capture register acts as a staging area that simplifies the organization and access of multichannel data without requiring complex hardware circuitry.

Inventive Principle:
Principle #1Segmentation

3Speed

If the AC-link interface controller directly accesses the output FIFO buffer for building serial data, then data transfer speed is improved, but manufacturing cost increases due to significant circuit development

Engineering Contradiction:
Improvedata transfer speedVSAvoidmanufacturing cost
Core Design Contradiction:
SpeedVSEase of manufacture

Solution Approach 1:

The patent implements preliminary action by having the capture register pre-store data from the output FIFO buffer before the AC-link interface controller needs to access it. This preliminary storage action allows the interface controller to retrieve data at full speed without requiring complex direct access circuitry. The capture register prepares the data in advance, enabling fast data transfer while using simpler, more cost-effective hardware implementation.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7689303B2Data transfer in audio codec controllers
Publication Date: 2010.03.30 ADVANCED MICRO DEVICES INC
  • US7689303B2 patent drawing
  • US7689303B2 patent drawing
  • US7689303B2 patent drawing

AI summary

An audio codec control technique is provided with improved multichannel data ordering capabilities. An audio codec controller comprises a first interface unit for performing data transfer to and from an audio codec, a second interface unit for performing data transfer from an external memory, and a data buffer for buffering data received from the external memory via the second interface unit. The controller further comprises a capture register for receiving from the data buffer data requested by the audio codec, and temporarily storing the received data. The first interface unit is connected to receive temporarily stored data from the capture register. The operation of the audio codec controller may be done in several operational modes including 2, 4, and 6-channel full-rate and half-rate modes.