Frame Reordering Latency Signaling in Real-Time Video Codecs

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Solution Overview

Problem

Existing video encoding and decoding technologies introduce unacceptably high latency in real-time communication scenarios, disrupting the flow of interactive applications such as remote desktop conferencing and video telephony.

Innovation Solution

Implementing syntax elements that constrain frame reordering latency, allowing decoders to quickly determine when reconstructed frames are ready for output, thereby reducing unnecessary delays in the encoding and decoding processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If frame reordering is performed to improve rate-distortion performance, then video quality is improved, but latency increases

Engineering Contradiction:
Improvevideo qualityVSAvoidlatency
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent introduces dynamic latency control by allowing the encoder to signal a maximum latency value in the bitstream. The decoder dynamically adjusts its frame reordering behavior based on this signaled latency constraint, enabling the system to adapt between quality-optimized mode (higher latency) and real-time mode (lower latency) without requiring separate encoding passes or fixed configurations.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operational parameter of frame reordering by imposing a constraint on the maximum latency. Instead of freely reordering frames to maximize compression efficiency, the system now operates with a bounded reordering depth determined by the latency parameter. This parameter change transforms the optimization objective from unconstrained rate-distortion performance to constrained latency-aware compression.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If frames are reordered to exploit inter-picture dependencies, then compression efficiency is improved, but decoding delay increases

Engineering Contradiction:
Improvecompression efficiencyVSAvoiddecoding delay
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by having the encoder pre-determine and signal the maximum latency constraint in the bitstream before decoding occurs. This allows the decoder to prepare its frame reordering strategy in advance, knowing the latency boundary, thus avoiding unnecessary delays while still exploiting inter-picture dependencies within the permitted reordering depth.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

When the latency constraint is tight, the patent enables the decoder to skip extensive frame reordering operations and rush through decoding with minimal reordering. This skipping of non-essential reordering steps reduces decoding delay while maintaining acceptable compression efficiency by relying on fewer reference frames.

Inventive Principle:
Principle #21Skipping (Rushing through)

3Manufacturing precision

If complex reordering operations are performed, then rate-distortion performance is improved, but computational complexity increases

Engineering Contradiction:
Improverate-distortion performanceVSAvoidcomputational complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the frame reordering process into a constrained sequence of operations bounded by the latency parameter. Instead of performing complex global reordering to optimize rate-distortion performance, the decoder segments the reordering into incremental steps that respect the latency constraint, reducing computational complexity while maintaining acceptable performance through localized optimizations.

Inventive Principle:
Principle #1Segmentation

4Manufacturing precision

If frames are buffered for reordering, then output order accuracy is improved, but memory requirements increase

Engineering Contradiction:
Improveoutput order accuracyVSAvoidmemory requirements
Core Design Contradiction:
Manufacturing precisionVSQuantity of substance

Solution Approach 1:

The patent applies partial action by buffering only the minimum number of frames necessary to satisfy the latency constraint, rather than buffering all frames that might be needed for optimal rate-distortion performance. This partial buffering approach maintains output order accuracy within the constrained latency window while significantly reducing memory requirements compared to full-frame buffering.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12513340B2Reducing latency in video encoding and decoding
Publication Date: 2025.12.30 MICROSOFT TECHNOLOGY LICENSING LLC
  • US12513340B2 patent drawing
  • US12513340B2 patent drawing
  • US12513340B2 patent drawing

AI summary

Techniques and tools for reducing latency in video encoding and decoding by constraining latency due to reordering of video frames, and by indicating the constraint on frame reordering latency with one or more syntax elements that accompany encoded data for the video frames. For example, a real-time communication tool with a video encoder sets a syntax element that indicates a constraint on frame reordering latency, which is consistent with inter-frame dependencies between multiple frames of a video sequence, then outputs the syntax element. A corresponding real-time communication tool with a video decoder receives the syntax element that indicates the constraint on frame reordering latency, determines the constraint on frame reordering latency based on the syntax element, and uses the constraint on frame reordering latency to determine when a reconstructed frame is ready for output (in terms of output order).