Codeword Bit Output Sequencing for Low-Latency Encoding

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Solution Overview

Problem

Conventional encoding techniques in wireless communication systems suffer from high encoder latency due to the lack of consideration for inter-branch dependencies, resulting in delayed output of codeword bits until the most dependent bit is calculated, which affects system performance in terms of overhead, coding gain, transmission pipelining, and decoding delay.

Innovation Solution

The proposed solution involves dividing encoding branches into subsets based on inter-branch dependencies, allowing for the output of codeword bits from independent subsets before those that depend on other branches, thereby reducing latency and simplifying memory access for decoders.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional encoding techniques are used without considering inter-branch dependencies, then the encoding process is simpler to implement, but the encoder latency increases and system performance deteriorates

Engineering Contradiction:
Improveencoder latencyVSAvoidencoding process complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The encoder divides the encoding branches into multiple subsets (first encoding branch subset, second encoding branch subset, etc.) based on inter-branch dependencies. Each subset can be processed independently and in parallel, allowing the encoder to output codeword bits from independent subsets before those that depend on other branches, thereby reducing overall encoder latency while maintaining manageable complexity through modular organization.

Inventive Principle:
Principle #1Segmentation

2Loss of time

If all input bits are loaded before outputting codeword bits, then the encoding is more straightforward, but the transmission delay increases and system responsiveness decreases

Engineering Contradiction:
Improvetransmission delayVSAvoidencoding operation simplicity
Core Design Contradiction:
Loss of timeVSEase of operation

Solution Approach 1:

The encoder performs preliminary encoding operations on subsets of input bits and outputs intermediate codeword bits before all input bits are fully loaded and processed. This allows the transmission to begin earlier with partially processed data, reducing transmission delay while the encoding operation continues in the background with increased complexity managed through the subset-based approach.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If encoding branches are processed in dependency order, then the decoding efficiency is improved, but the encoding complexity increases due to dependency tracking

Engineering Contradiction:
Improvedecoding efficiencyVSAvoiddependency tracking complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The encoding branches are segmented into subsets where the output of one subset may serve as input to another subset, creating a clear dependency hierarchy. This segmentation enables the decoder to process subsets in the correct dependency order efficiently, while the encoder manages complexity by systematically organizing which subsets depend on which others, making the dependency tracking more structured and manageable.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10320428B2Outputting of codeword bits for transmission prior to loading all input bits
Publication Date: 2019.06.11 QUALCOMM INC
  • US10320428B2 patent drawing
  • US10320428B2 patent drawing
  • US10320428B2 patent drawing

AI summary

Methods, systems, and devices for outputting of codeword bits for transmission prior to loading all input bits. An example encoder may have multiple encoding branches. The encoder may divide the encoding branches into first and second encoding branch subsets, outputs of the first encoding branch subset being independent of inputs to the second encoding branch subset. The encoder may generate first and second subsets of output bits of a codeword in first and second encoding operations, the generating comprising inputting information bits of an information bit-vector and at least one frozen bit into respective encoding branches of the plurality of encoding branches and generating the first subset of output bits using the first encoding branch subset prior to generating the second subset of output bits using the second encoding branch subset. The encoder may output the first subset of output bits prior to outputting the second subset of output bits.