Coding Method for Multi-Level Memory Systems

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Solution Overview

Problem

Semiconductor memory devices face errors due to data patterns that induce coupling effects between adjacent memory cells, leading to inaccurate read operations, particularly in multi-level memory systems where complex data storage and retrieval are involved.

Innovation Solution

A coding method that identifies and avoids 'forbidden patterns' by designating a 'stuck bit' in the data to prevent erroneous readings, and a decoding process that recovers the original data using location information from the encoding process, ensuring accurate data retrieval without the need for extensive decoding across multiple word lines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If data is stored in multi-level memory cells to increase storage capacity, then storage density is improved, but coupling effects between adjacent memory cells cause read errors

Engineering Contradiction:
Improvestorage capacityVSAvoidread accuracy
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The coding method performs preliminary action by identifying and avoiding forbidden data patterns before data is written to the memory device. The encoder searches for symbols that would generate forbidden patterns and sticks bits in advance to prevent their generation, thereby preventing coupling-induced read errors before they occur.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention applies preliminary anti-action by proactively preventing the formation of forbidden data patterns that cause coupling effects. The encoder identifies potential forbidden patterns and modifies the data in advance to eliminate these harmful patterns, countering the coupling effect problem before it manifests during read operations.

Inventive Principle:
Principle #9Preliminary anti-action

2Reliability

If conventional decoding is performed across multiple word lines to correct coupling-induced errors, then read accuracy is improved, but computational overhead and time consumption increase

Engineering Contradiction:
Improveread accuracyVSAvoiddecoding time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The invention extracts and handles only the specific bits that are stuck due to coupling effects, rather than performing comprehensive decoding across multiple word lines. The decoder identifies location information of stuck bits and recovers only those specific bits, significantly reducing computational overhead and decoding time while maintaining read accuracy.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The decoding process is segmented into identifying location information of stuck bits and recovering only those specific bits. This segmentation allows the system to avoid the computationally expensive task of decoding entire word lines or blocks, focusing resources only on the affected bits and thereby reducing time consumption.

Inventive Principle:
Principle #1Segmentation

3Reliability

If forbidden patterns are completely avoided by sticking multiple bits, then read accuracy is improved, but data encoding complexity increases

Engineering Contradiction:
Improveread accuracyVSAvoidencoding complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention applies partial action by sticking only the necessary bits to avoid forbidden patterns, rather than modifying all bits in the data stream. The encoder identifies specific symbols that would generate forbidden patterns and sticks only the minimum required bits to prevent their generation, thereby improving read accuracy while minimizing encoding complexity.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS9570174B2Coding method and decoding method in memory system
Publication Date: 2017.02.14 SAMSUNG ELECTRONICS CO LTD
  • US9570174B2 patent drawing
  • US9570174B2 patent drawing
  • US9570174B2 patent drawing

AI summary

Provided are a coding/decoding method for use in a multi-level memory system. The coding method includes searching for a set of symbols that may generate a forbidden pattern that is set initially from an input data stream, and sticking at least one bit included in the searched set of the symbols that may generate the forbidden pattern so as not to generate the forbidden pattern.