Co-doped SiC Epitaxial Layer for Carrier Mobility
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Solution Overview
Problem
The mobility of carriers in SiC semiconductor devices is hindered by residual defects, limiting their performance and efficiency, particularly in power applications where low energy loss and high-temperature operation are desired.
Innovation Solution
The implementation of co-doping with specific impurity combinations such as Al and N, or Ga and In, in SiC epitaxial layers to form stable pair structures and trimers, which reduce crystal strain and enhance carrier mobility by adjusting impurity concentrations and ratios within specific ranges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If SiC is used as the semiconductor material, then breakdown field strength and heat conductivity are improved, but carrier mobility deteriorates due to residual defects
Solution Approach 1:
The patent changes the chemical composition parameters of SiC by introducing specific impurity elements (Al, Ga, In, B, P) at controlled concentrations. This co-doping approach modifies the crystal structure and defect characteristics, thereby improving carrier mobility while preserving the high breakdown field strength and heat conductivity of SiC
Solution Approach 2:
The patent creates a composite-doped SiC material system by combining multiple impurity elements (e.g., Al+N, Ga+P, In+B) within the SiC crystal lattice. This composite approach allows the material to simultaneously exhibit high breakdown strength from the SiC base and improved carrier mobility from the synergistic effect of multiple dopants
2Reliability
If impurity concentration is increased to improve conductivity, then sheet resistance is reduced, but solid solubility limit is exceeded causing defects
Solution Approach 1:
The patent utilizes parameter changes by adjusting the concentration ratios of multiple impurity elements simultaneously. By distributing the total dopant concentration across several elements (e.g., Al and N together), the patent achieves high conductivity while keeping individual element concentrations below their respective solid solubility limits, preventing defect formation
3Ease of manufacture
If single-element doping is used to simplify the process, then manufacturing complexity is reduced, but carrier mobility improvement is insufficient
Solution Approach 1:
The patent merges multiple doping elements into a unified co-doping process. By combining impurity elements that form stable pairs or trimers (e.g., Al-N, Ga-P, In-B), the patent achieves synergistic effects that improve carrier mobility beyond what single-element doping can provide, while still using standard semiconductor fabrication processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves electron mobility, reduces strain, and increases the solid solubility limits of impurities, leading to lower sheet resistance and contact resistance, thus enabling the formation of high-performance SiC semiconductor devices with reduced defects and enhanced reliability.
Implementation Method 1
co-doped with a p-type impurity and an n-type impurity, the p-type impurity being an element A, the n-type impurity being an element D, the element A and the element D forming at least one of a first combination or a second combination, the first combination being a combination of the element A selected from a group consisting of Al (aluminum), Ga (gallium), and In (indium) and the element D being N (nitrogen), the second combination being a combination of the element A being B (boron) and the element D being P (phosphorus)
Implementation Method 2
the co-doped SiC epitaxial layer... can reduce crystal strain
Data Source
AI summary
A semiconductor device of an embodiment includes: an n-type first SiC epitaxial layer; a p-type second SiC epitaxial layer on the first SiC epitaxial layer containing a p-type impurity and an n-type impurity, the p-type impurity being an element A, the n-type impurity being an element D, the element A and the element D forming a combination of Al, Ga, or In and N, and/or a combination of B and P, the ratio of the concentration of the element D to the element A being higher than 0.33 but lower than 1.0; a surface region at the surface of the second SiC epitaxial layer containing the element A at a lower concentration than in the second SiC epitaxial layer, the ratio being higher than in the second SiC epitaxial layer; n-type first and second SiC regions; a gate insulating film; a gate electrode; a first electrode; and a second electrode.