Co-Doped TFT Semiconductor Regions for Threshold Voltage Stability
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Solution Overview
Problem
As integrated circuits scale downward in size, process variations in interconnect structures such as gate structures, drain regions, and source regions lead to device performance instability and low yield, particularly in thin film transistor (TFT) structures, due to susceptibility to environmental changes and high temperatures during back-end-of-the-line processing.
Innovation Solution
The implementation of co-doped semiconductor regions in TFT structures, using multiple insulating dopants such as oxygen, hafnium, tungsten, aluminum, and others, reduces conductivity and increases threshold voltage, stabilizing transistor performance by tuning the doping profile through techniques like co-sputtering and ion implantation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If transistor area is decreased to enable scaling, then integration density is improved, but device performance stability deteriorates due to process variations
Solution Approach 1:
The patent changes the electrical parameters of the semiconductor region by introducing insulating dopants (oxygen, hafnium, tungsten, aluminum) to modify conductivity and threshold voltage. This allows maintaining smaller transistor area while compensating for performance variations through controlled doping profiles, thus preserving stability despite scaling.
Solution Approach 2:
The patent creates a composite-doped semiconductor region by combining multiple insulating dopant elements (oxygen, hafnium, tungsten, aluminum) within the semiconductor material. This composite approach provides synergistic effects that enhance both threshold voltage control and conductivity reduction, improving reliability in scaled devices.
2Reliability
If insulating dopants are added to semiconductor region, then threshold voltage is increased and conductivity is reduced, but device complexity increases
Solution Approach 1:
The patent merges multiple doping functions into a single co-doped semiconductor region structure. By combining oxygen, hafnium, tungsten, and aluminum dopants in one region, the patent achieves multiple objectives (threshold voltage adjustment, conductivity control, stability improvement) simultaneously, reducing the need for separate structural modifications.
Solution Approach 2:
The patent modifies the semiconductor region's electrical parameters through controlled introduction of insulating dopants. By adjusting dopant concentrations and profiles, the patent optimizes threshold voltage and conductivity without fundamentally changing the device architecture, thus limiting complexity increase.
3Manufacturing precision
If co-doping is used to stabilize TFT performance, then manufacturing precision is improved, but process complexity increases
Solution Approach 1:
The patent achieves precise threshold voltage control by adjusting the concentrations and profiles of multiple insulating dopants (oxygen, hafnium, tungsten, aluminum). This parametric control allows fine-tuning of device characteristics while using established doping techniques like ion implantation and diffusion, managing process complexity through controlled variable adjustment.
Solution Approach 2:
The patent incorporates dopants into the semiconductor region during or before transistor fabrication, establishing the desired electrical properties in advance. This preliminary doping action ensures consistent threshold voltage and conductivity characteristics are built into the structure early in the manufacturing process, improving precision without adding complex post-processing steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The co-doped semiconductor regions enhance the stability and reliability of TFT structures, improving the performance and yield of memory cells by reducing conductivity and enhancing threshold voltage, particularly beneficial for DRAM architectures.
Implementation Method 1
The semiconductor region includes two or more insulating dopant elements or one or more insulating dopant compounds
Implementation Method 2
ion implantation
Implementation Method 3
co-sputtering
Data Source
AI summary
Techniques are provided herein for forming thin film transistor structures having co-doped semiconductor regions. The addition of insulating dopants can be used to improve the performance, stability, and reliability of the TFT. A given TFT structure within an array of similar TFT structures formed in an interconnect region may include a semiconductor region that is co-doped with one or more additional elements. The doping profile can be tuned to optimize performance, stability, and reliability of the TFT structure. In some embodiments, the doping profile causes an overall reduction in the conductivity of the semiconductor region, leading to a higher threshold voltage. Designing access devices (in, for example, a DRAM architecture) with higher threshold voltages can be beneficial for improving reliability of the memory cell.