Chip on Film Circuit Board EMI Reduction via Voltage Line Area Ratio

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Solution Overview

Problem

As display panels increase in size and display driver integrated circuits (IC) become smaller, electromagnetic interference (EMI) generated by current flow in source driver ICs can cause malfunctions in electronic devices, necessitating a reduction in EMI.

Innovation Solution

A chip on film circuit board design with a specific configuration of voltage lines and ground lines on a flexible printed circuit, where the ratio of voltage line area to film area is optimized, and wiring widths are carefully managed, along with the inclusion of bumps for connection and voids to reduce EMI.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the display panel size is increased and the source driver IC is miniaturized, then the device integration is improved, but electromagnetic interference increases causing malfunctions

Engineering Contradiction:
Improvedevice integrationVSAvoidelectromagnetic interference
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

A ground line is introduced as an intermediary element between the voltage lines and the source driver IC. This ground line acts as a shield that intercepts electromagnetic interference before it reaches the IC, while maintaining the miniaturized design. The ground line is connected to ground potential and positioned to provide electromagnetic shielding without adding significant size.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the wiring width of voltage lines is increased to reduce resistance, then voltage supply stability is improved, but the area occupied by wiring increases reducing available space

Engineering Contradiction:
Improvevoltage supply stabilityVSAvoidwiring area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The wiring width is optimized locally rather than uniformly across all traces. Critical voltage lines that require higher current have increased width for reduced resistance, while less critical signal lines maintain standard width. This localized optimization achieves voltage supply stability where needed without unnecessarily increasing total wiring area.

Inventive Principle:
Principle #3Local quality

3Object-generated harmful factors

If multiple ground lines with different wiring widths are used to reduce EMI, then electromagnetic shielding is improved, but the design complexity increases

Engineering Contradiction:
Improveelectromagnetic interference reductionVSAvoidground line configuration
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

Ground lines are designed with asymmetric width variations based on their specific functional requirements. The first ground line has a different width profile than the second ground line, with each optimized for its particular shielding role. This asymmetric design provides effective EMI reduction while following systematic design rules that prevent excessive complexity.

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS10276086B2Chip on film circuit board for reducing electromagnetic interference and display device having the same
Publication Date: 2019.04.30 SAMSUNG ELECTRONICS CO LTD
  • US10276086B2 patent drawing
  • US10276086B2 patent drawing
  • US10276086B2 patent drawing

AI summary

A chip on film circuit board is provided. The chip on film circuit board includes a film circuit board configured to include a first edge and a second edge each extending in a first direction, and a source driver IC configured to be connected to a plurality of voltage lines placed on the film circuit board, in which a ratio of an area in which the plurality of voltage lines are placed to a film area of the film circuit board is about 0.7 or greater and about 0.996 or less.