Chip-on-Film Double-Sided Wiring for High-Resolution Displays
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As displays with larger areas and higher resolutions are developed, the increased number of gate lines and data lines on display panels poses a limit on the formation of signal wiring lines in chip-on-film (COF), leading to issues with signal application and compatibility with high-resolution displays due to space constraints.
Innovation Solution
The COF design incorporates a base film with first and second through-holes, where a driver chip is mounted on one surface, and pad groups are arranged on the opposite surface, with signal wiring lines connecting the pads to the driver chip through these holes, allowing for staggered and offset pad arrangements to reduce the area required while maintaining efficient signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of data lines is increased to support higher resolution displays, then the display resolution is improved, but the area required for signal wiring lines in the COF exceeds the available space
Solution Approach 1:
The patent utilizes both the front surface and back surface of the COF base film to route signal wiring lines. By transitioning from single-sided to double-sided wiring, the effective wiring area is doubled without increasing the physical footprint of the COF, thereby accommodating the increased number of data lines required for high-resolution displays.
Solution Approach 2:
The signal wiring lines are divided into two separate sets: first signal wiring lines on the front surface and second signal wiring lines on the back surface. This segmentation allows independent routing and reduces congestion on each surface, enabling the COF to handle a larger total number of signal connections within the same area.
2Quantity of substance
If the width of the COF is increased to accommodate more signal wiring lines, then the signal transmission capacity is improved, but the overall area occupied by the COF increases
Solution Approach 1:
Instead of increasing the width of the COF to add more signal wiring lines, the patent extends the wiring capacity by utilizing the third dimension - the back surface of the COF. This allows the COF to maintain its original width while doubling the available space for signal wiring lines through double-sided routing.
3Quantity of substance
If the number of pads is increased to support more data lines, then the signal connection capacity is improved, but the area required for pad arrangement exceeds the available space
Solution Approach 1:
The pads are segmented into two groups: first pads arranged on the front surface and second pads arranged on the back surface. This segmentation distributes the total pad quantity across two surfaces, reducing the pad density requirement on each individual surface and enabling the COF to support more data lines without increasing its area.
Data Source
AI summary
Disclosed herein is a chip-on-film including: a base film; a driver mounted on one of upper and lower surfaces of the base film; and at least one pad group, which includes signal wiring lines disposed on the upper and lower surfaces of the base film and transmitting signals via two paths, a first pad and a second pad disposed on one of the upper and lower surfaces of the base film, and a plurality of through-holes disposed between the first pad and the second pad and electrically connecting the signal wiring lines to each other, wherein the first pad and the second pad are separated a predetermined distance from each other in a width direction of the base film, and each of the first pad and the second pad is obliquely arranged in plural in a longitudinal direction of the base film.