COF Semiconductor Package Pad Layout for Heat and Resistance Control

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Solution Overview

Problem

Existing chip-on-film (COF) packages face challenges in reliability and heat management due to the design of conductive bumps and pads, which can lead to increased resistance and heating.

Innovation Solution

The semiconductor package incorporates a film substrate with specific pad and bump configurations, including dummy pads and varied pitch spacing, along with multiple lines to reduce resistance and improve heat dissipation, utilizing a flexible polyimide substrate and conductive materials like copper.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional pad and bump designs are used in COF packages, then manufacturing is simpler, but resistance increases and heat dissipation deteriorates

Engineering Contradiction:

Improvepackage reliabilityVSAvoidpad and bump configuration complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The pad structure is segmented into multiple types (first pads, second pads, third pads) with different functions and positions. The bumps are segmented into first conductive bumps and second conductive bumps located at different regions. This segmentation allows optimization of electrical connection and heat dissipation paths while maintaining manufacturing feasibility through standardized processes.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different regions of the package are assigned different pad and bump configurations tailored to local requirements. The first pads with first conductive bumps provide primary electrical connections, while the second pads with second conductive bumps optimize heat dissipation. The pitch values are locally optimized (120-300 μm for first pads, 300-500 μm for second pads) based on functional requirements.

Inventive Principle:

Principle #3Local quality

2Temperature

If pitch between pads is reduced to improve heat dissipation, then heat radiation improves, but manufacturing precision requirements increase

Engineering Contradiction:

Improveheat dissipationVSAvoidpad pitch control precision

Core Design Contradiction:

TemperatureVSManufacturing precision

Solution Approach 1:

The pitch parameters are optimized to specific ranges (120-300 μm for first pads, 300-500 μm for second pads) that balance heat dissipation performance with manufacturing capabilities. These parameter changes ensure adequate heat radiation while remaining within the precision capabilities of existing manufacturing processes.

Inventive Principle:

Principle #35Parameter changes

3Reliability

If multiple types of pads and bumps are implemented, then electrical connection and heat dissipation improve, but device complexity increases

Engineering Contradiction:

Improveelectrical connection reliabilityVSAvoidnumber of pad and bump types

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The pad and bump structure is designed to serve multiple functions simultaneously. The first pads provide both electrical connection and heat dissipation, while the second pads primarily handle heat dissipation. The third pads provide additional electrical connections. This multi-functionality approach improves reliability without requiring entirely separate systems for each function.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enhances reliability and heat radiation characteristics by reducing resistance and improving thermal expansion uniformity, thereby enhancing the performance and durability of semiconductor packages.

Implementation Method 1

first lines that electrically connect ones of the first pads to ones of the first conductive bumps

Methodology Applied

Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

first conductive bumps adjacent to the first edge region and second conductive bumps adjacent to the second edge region

Methodology Applied

Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 3

improving heat radiation characteristics by reducing resistance and improving thermal expansion uniformity

Methodology Applied

Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20260076215A1Semiconductor package and package module including the same

Publication Date: 2026.03.12 SAMSUNG ELECTRONICS CO LTD

AI summary

A semiconductor package includes a film substrate that includes a chip region, a first edge region, and a second edge region. The semiconductor package includes a semiconductor chip on the chip region, where the semiconductor chip includes first conductive bumps adjacent to the first edge region and second conductive bumps adjacent to the second edge region. The semiconductor package includes first pads and second pads on the first edge region, and first lines that electrically connect ones of the first pads to ones of the first conductive bumps. The second pads are dummy pads. A first set of the second pads and a second set of the second pads are spaced apart from each other in the second direction with the first pads therebetween. The first set of second pads includes ten or more consecutive second pads with no first pads therebetween.