Chip-on-Film Protective Layer for Output Wiring Impact Resistance

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Chip-on-film packages in display devices are prone to damage from external impacts due to interference with internal elements, which affects the connection state of output wiring and insulation layers.

Innovation Solution

Incorporating a protective layer between the semiconductor chip and the output pad portion, positioned to overlap at least a portion of the output wiring, to prevent physical impact from the panel mechanism, using a resin-based protective layer with a specific width and thickness to effectively shield the base film, output wiring, and insulation layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If chip on film packages are used for miniaturization and lightweight design, then device size and weight are reduced, but vulnerability to external impacts increases

Engineering Contradiction:

Improvepackage sizeVSAvoidexternal impact damage

Core Design Contradiction:

Volume of moving objectVSObject-affected harmful factors

Solution Approach 1:

A protective layer is disposed between the semiconductor chip and the output pad portion to provide beforehand cushioning against external impacts. This protective layer absorbs impact forces before they can damage the internal elements, resolving the contradiction by adding protection without significantly increasing package volume.

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The protective layer is formed using a resin composition that may include inorganic particles, creating a composite material structure. This composite approach provides enhanced mechanical protection while maintaining the lightweight and compact characteristics of the COF package.

Inventive Principle:

Principle #40Composite materials

2Reliability

If the protective layer is added to prevent impact damage, then reliability under external stress improves, but device complexity increases

Engineering Contradiction:

Improveimpact resistanceVSAvoidstructural complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The protective layer is implemented as a thin film structure that can be integrated into the existing COF package architecture. This thin film approach provides necessary protection while minimizing the increase in structural complexity and maintaining the flexibility inherent in COF packages.

Inventive Principle:

Principle #30Flexible shells and thin films

3Object-affected harmful factors

If the protective layer overlaps the output wiring to provide protection, then impact resistance improves, but manufacturing precision requirements increase

Engineering Contradiction:

Improveoutput wiring protectionVSAvoidlayer alignment precision

Core Design Contradiction:

Object-affected harmful factorsVSManufacturing precision

Solution Approach 1:

The protective layer serves multiple functions simultaneously: it protects the output wiring from external impacts, provides mechanical support, and can be integrated with the existing insulation layer structure. This multi-functionality approach reduces the need for additional specialized components and simplifies the overall manufacturing process.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS20240079418A1Chip on film package including protective layer and display device including the same

Publication Date: 2024.03.07 LX SEMICON CO LTD

AI summary

Disclosed herein is a chip on film package including a base film, output wiring disposed on the base film and extending along a first direction, an insulation layer overlapping at least a portion of the output wiring, an output pad portion defined as a region in which the output wiring is exposed without the insulation layer, a semiconductor chip mounted on the base film and electrically connected to the output wiring, and a protective layer disposed between the semiconductor chip and the output pad portion with respect to the first direction.