Chip-on-Film Routing Layout for Multi-Chip Bonding Pitch

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Solution Overview

Problem

The increasing demand for bezel downscaling and panel thinning in display apparatuses necessitates a more efficient arrangement of conductive lines and pads in chip-on-film (COF) packages to accommodate multiple semiconductor chips while maintaining a predetermined bonding pitch.

Innovation Solution

A COF package design with a base film featuring conductive lines and pads arranged in a zigzag pattern on both surfaces, connecting different types of semiconductor chips, including a source driver chip and a gate driver chip, with specific bonding pads and vias to optimize spacing and minimize intersections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple semiconductor chips are mounted on a base film to accommodate bezel downscaling and panel thinning, then the functionality and integration of the display apparatus are improved, but the routing complexity and difficulty of maintaining predetermined bonding pitch increase

Engineering Contradiction:
Improveintegration of multiple chipsVSAvoidrouting complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies dimensionality change by transitioning from a planar two-dimensional arrangement of conductive lines and bonding pads to a three-dimensional configuration that utilizes both the top and bottom surfaces of the base film. Conductive lines are routed on opposite sides of the base film, allowing signals to travel through multiple dimensions rather than being constrained to a single plane. This spatial reconfiguration reduces routing complexity by distributing conductive paths across different layers and surfaces, thereby accommodating multiple semiconductor chips while maintaining predetermined bonding pitch requirements.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If conductive lines are arranged in traditional linear patterns, then the manufacturing process is simpler, but the signal transmission speed and routing efficiency decrease

Engineering Contradiction:
Improveconductive line arrangementVSAvoidsignal transmission speed
Core Design Contradiction:
Ease of manufactureVSSpeed

Solution Approach 1:

The patent implements curvature by replacing traditional linear conductive line patterns with zigzag-shaped conductive lines that extend across the base film. These zigzag patterns provide multiple signal transmission paths between bonding pads, enabling signals to traverse longer distances through curved and angled routes rather than direct linear paths. The curved zigzag configuration increases routing efficiency and signal transmission speed by creating redundant pathways and optimizing signal flow across the base film structure, while remaining compatible with standard manufacturing processes.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Data Source

PatentUS12412826B2Chip-on-film packages and display apparatuses including the same
Publication Date: 2025.09.09 SAMSUNG ELECTRONICS CO LTD
  • US12412826B2 patent drawing
  • US12412826B2 patent drawing
  • US12412826B2 patent drawing

AI summary

A chip-on-film package includes a base film having a top surface and a bottom surface, and a circuit region; a source driver chip and a gate driver chip mounted on the circuit region; a first conductive line on the top surface of the base film, a second conductive line on the bottom surface of the base film, and a conductive via that connects the first and second conductive lines to each other; a first row of bonding pads on the circuit region and connected to the source driver chip; a second row of bonding pads on the circuit region and connected to the source driver chip and the gate driver chip; and a test pad outside the circuit region and connected to the first and second conductive lines and the conductive via.