Coherence Point Transaction Ordering Logic
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Solution Overview
Problem
In systems on chip (SoC), maintaining the order of memory transactions with address dependencies is challenging due to non-first-in-first-out transaction queues, which can lead to improper access and completion of transactions sharing the same address.
Innovation Solution
Implementing a coherence point with current transaction tables (CTTs) that include input request queues and victim address queues, using a linked-list structure to ensure transactions are completed in the order received, and utilizing a level two (L2) duplicate tag unit to prevent access until earlier transactions are completed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a non-FIFO queue is used to store transactions in the coherence point, then the queue can operate with flexible ordering, but the transaction completion order may not match the reception order, leading to coherence violations
Solution Approach 1:
The patent introduces an intermediary mechanism (ordering logic with linked-list structure) between the non-FIFO queue and transaction processing to ensure proper ordering. The head pointer field and linked-list connections act as mediators that track and enforce reception order despite the queue's flexible internal ordering, resolving the contradiction between queue flexibility and transaction coherence.
2Reliability
If dependency checking logic is implemented to maintain transaction order, then transaction coherence is improved, but the complexity of the coherence point increases
Solution Approach 1:
The dependency checking logic operates autonomously within the coherence point, automatically detecting address dependencies and managing linked-list structures without external intervention. This self-service approach maintains coherence while minimizing the need for additional control logic, balancing reliability improvement with acceptable complexity increase.
3Reliability
If transactions are processed in reception order using linked-list structures, then address dependency coherence is maintained, but the processing speed may be reduced due to additional ordering checks
Solution Approach 1:
The patent performs preliminary actions by establishing linked-list connections and setting head pointers when transactions are first received and stored in the queue. This preliminary ordering setup eliminates the need for continuous ordering checks during processing, as the linked-list structure already encodes the required execution order, thus maintaining coherence while minimizing speed impact.
Data Source
AI summary
Systems and methods for maintaining an order of transactions in the coherence point. The coherence point stores attributes associated with received transactions in an input request queue (IRQ). When a new transaction is received by the coherence point, the IRQ is searched for other entries with the same request address or the same victim address as the new transaction. If one or more matches are found, the new transaction entry points to the entry storing the most recently received transaction with the same address. The new transaction is stalled until the transaction it points to has been completed in the coherence point.