Coherence Protocol Augmentation for Transaction Status Feedback

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Solution Overview

Problem

In multiprocessor systems, existing coherence protocols lack the ability to provide feedback on transaction status, making it difficult for processors to adapt to performance-degrading scenarios like livelock, as they do not inform the originator whether their requests have caused other transactions to abort, leading to inefficiencies in resource management and concurrency.

Innovation Solution

The coherence protocol is extended to include additional information about transaction status, specifically including the type of interference, clock cycles worked before abortion, and whether a rollback occurred, which is sent from a remote processor to the requesting processor and tracked in a transaction interference table.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If hardware transactional memory is implemented to improve software scalability and reduce locking complexity, then concurrency performance is improved, but the ability to detect and adapt to transaction interference and livelock conditions deteriorates due to lack of feedback information

Engineering Contradiction:

Improveconcurrency performanceVSAvoidtransaction status feedback

Core Design Contradiction:

ProductivityVSLoss of information

Solution Approach 1:

The patent extends the coherence protocol to include feedback information about transaction status. When a coherence request is received, the system determines whether the requesting transaction caused another transaction to abort, and this information is communicated back to the requesting processor. This feedback mechanism enables processors to detect interference conditions and adapt their transaction execution strategies, resolving the information loss problem while maintaining high concurrency performance.

Inventive Principle:

Principle #23Feedback

2Speed

If processors execute transactions optimistically without locks to improve speed, then execution speed is improved, but the reliability of transaction completion deteriorates due to potential aborts from interference

Engineering Contradiction:

Improvetransaction execution speedVSAvoidtransaction completion reliability

Core Design Contradiction:

SpeedVSReliability

Solution Approach 1:

The system provides feedback to processors about whether their transactions caused aborts in other transactions. This information allows processors to make informed decisions about retrying transactions or adjusting their execution strategy, thereby improving transaction completion reliability while maintaining optimistic execution speed.

Inventive Principle:

Principle #23Feedback

Solution Approach 2:

The patent enables dynamic adjustment of transaction execution behavior based on feedback information. Processors can adaptively modify their transaction strategies (e.g., retry decisions, timing) based on the interference information received, making the system dynamically responsive to actual transaction conditions rather than following fixed protocols.

Inventive Principle:

Principle #15Dynamics

3Adaptability or versatility

If fine-grained locking is implemented to improve software scalability, then scalability is improved, but device complexity and error-proneness increase

Engineering Contradiction:

Improvesoftware scalabilityVSAvoidlocking mechanism complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent replaces the mechanical locking system with a feedback-based transactional memory system. Instead of using complex lock acquisition, holding, and release mechanisms, the system uses optimistic transaction execution with feedback about interference conditions. This substitution reduces the complexity of synchronization mechanisms while maintaining or improving scalability.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

4Stability of the object's composition

If traditional coherence protocols are used to maintain cache consistency, then cache coherence is maintained, but the ability to manage transaction interference and reduce livelock deteriorates

Engineering Contradiction:

Improvecache coherenceVSAvoidtransaction interference management

Core Design Contradiction:

Stability of the object's compositionVSAdaptability or versatility

Solution Approach 1:

The patent extends the traditional coherence protocol to serve multiple functions: maintaining cache coherence (original function) and providing transaction status feedback (new function). By making the protocol multi-functional, the system maintains cache coherence while simultaneously enabling transaction interference management and livelock reduction without requiring a separate mechanism.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentEP3117323B1Coherence protocol augmentation to indicate transaction status

Publication Date: 2019.12.04 INTERNATIONAL BUSINESS MACHINE CORPORATION

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AI summary

Embodiments relate to implementing a coherence protocol. An aspect includes sending a request for data to a remote processor and receiving by a processor a response from the remote processor. The response has a transaction status of a remote transaction on the remote processor. The processor adds the transaction status of the remote transaction on the remote processor in a local transaction interference tracking table.