Coherence Model Translator for Heterogeneous SoC Agents

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Solution Overview

Problem

Integration of heterogeneous processing units with different and incompatible coherence models in systems-on-chip (SoCs) poses challenges, leading to higher design costs and longer development cycles due to the need for selecting compatible, but less optimal, processing units.

Innovation Solution

A translator is used to adapt between different coherence models, intermediating the exchange of coherency requests and responses between agents and a coherence controller, making the coherence models of agents and controllers transparent to each other, allowing them to be designed according to their respective protocols.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If heterogeneous processing units with different coherence models are integrated, then system performance and functionality are improved, but integration complexity and design difficulty increase

Engineering Contradiction:
Improvecompatibility of processing unitsVSAvoidcoherence model integration complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces a translator as an intermediary component between processing units with different coherence models and the coherence controller. This translator converts coherence model-specific requests and responses into a standardized format, enabling heterogeneous processing units to communicate without direct compatibility requirements. The translator acts as a buffer that handles the complexity of model differences, allowing the coherence controller to operate with a unified interface.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If processing units with incompatible coherence models are directly integrated, then design costs and development cycles increase, but if compatible units are selected, then system optimality decreases

Engineering Contradiction:
Improvedesign cost and development cycleVSAvoidprocessing unit selection flexibility
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The translator serves as a mediation layer that reconciles incompatible coherence models, enabling the integration of diverse processing units without incurring additional design costs or extending development cycles. By standardizing the interface between processing units and the coherence controller, the system achieves both cost efficiency and unit selection flexibility simultaneously.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The translator dynamically adjusts coherence model parameters by mapping different cache state models and transaction protocols to a standardized representation. This parameter transformation allows processing units with varying coherence characteristics to be integrated seamlessly, providing design flexibility without compromising system coherence.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If a standardized coherence model is enforced across all agents, then integration is simplified, but agent design freedom and optimization are reduced

Engineering Contradiction:
Improvecoherence model standardizationVSAvoidagent design freedom
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The translator enables agents to maintain their native coherence model designs while interfacing with the standardized coherence controller. This architecture preserves agent design freedom by allowing each agent to implement its optimal coherence model, while the translator handles the adaptation to the standardized interface, thus maintaining integration simplicity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20170024320A1System and method for adaptation of coherence models between agents
Publication Date: 2017.01.26 ARTERIS INC
  • US20170024320A1 patent drawing
  • US20170024320A1 patent drawing
  • US20170024320A1 patent drawing

AI summary

A system and method are disclosed for multiple coherent caches supporting agents that use different, incompatible coherence models. Compatibility is implemented by translators that accept coherency requests and snoop responses from an agent and accept snoop requests and coherency responses from a coherence controller. The translators issue corresponding coherency requests and snoop responses to the coherence controller and issue corresponding coherency responses and snoop requests to the agent. Interaction between translators and the coherence controller accord with a generic coherence model, which may be a subset, superset, or partially inclusive of features of any native coherence model. A generic coherence protocol may include binary values for each of characteristics: valid or invalid, owned or non-owned, unique or shared, and clean or dirty.