Coherency Control Using Snoop-Filter Cache Information

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Solution Overview

Problem

Existing data processing systems face inefficiencies in servicing memory transactions due to the need to wait for coherency message responses, which increases latency and consumes significant area and power resources.

Innovation Solution

Implementing a non-inclusive cache with associated snoop-filter information to determine whether data can be used without waiting for coherency message responses from higher-level caches, reducing the need for unnecessary snooping and optimizing cache usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If coherency messages are sent to snoop other caches before servicing memory transactions, then data coherency is maintained, but memory transaction latency increases

Engineering Contradiction:
Improvedata coherencyVSAvoidmemory transaction latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The snoop-filter information is populated in advance with cache line addresses from higher-level caches. When a memory transaction occurs, this pre-populated information allows the system to quickly determine whether snooping is necessary, avoiding the need to send coherency messages for every transaction and thus reducing latency while maintaining coherency when needed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Instead of performing full snooping for every memory transaction, the system uses snoop-filter information to perform partial action - only sending coherency messages when the filter indicates that higher-level caches may contain the requested data. This selective approach reduces unnecessary snooping operations and latency.

Inventive Principle:
Principle #16Partial or excessive action

2Reliability

If coherency messages are sent to ensure data freshness, then data accuracy is maintained, but power consumption increases

Engineering Contradiction:
Improvedata accuracyVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The snoop-filter mechanism enables partial action by filtering out memory transactions that do not require coherency checking. By using the pre-populated filter information to determine when snooping is necessary, the system avoids sending unnecessary coherency messages, thereby reducing power consumption while maintaining data accuracy for transactions that do require coherency verification.

Inventive Principle:
Principle #16Partial or excessive action

3Area of stationary object

If a non-inclusive cache is used instead of an inclusive cache, then cache area and power are reduced, but the ability to service transactions without snooping is compromised

Engineering Contradiction:
Improvecache areaVSAvoidtransaction servicing time
Core Design Contradiction:
Area of stationary objectVSLoss of time

Solution Approach 1:

The snoop-filter information is pre-populated with cache line addresses from higher-level caches during cache operations. This preliminary action enables the non-inclusive cache to quickly determine whether a hit can be serviced without snooping, compensating for its non-inclusive nature and avoiding unnecessary delays while maintaining the area and power benefits of the non-inclusive design.

Inventive Principle:
Principle #10Preliminary action

4Loss of time

If snoop-filter information is maintained for each cache entry, then latency is reduced by avoiding unnecessary snoops, but cache entry complexity increases

Engineering Contradiction:
Improvetransaction latencyVSAvoidcache entry structure
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

Instead of maintaining complex snoop-filter data structures separate from the cache, the invention copies or integrates the snoop-filter information directly into the cache entry structure. This integration allows the filter information to be maintained alongside cache data, reducing latency by having immediate access to filtering information while managing complexity through unified structure design.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS12423236B2Coherency control
Publication Date: 2025.09.23 ARM LTD
  • US12423236B2 patent drawing
  • US12423236B2 patent drawing
  • US12423236B2 patent drawing

AI summary

An apparatus comprises an non-inclusive cache (14) configured to cache data and coherency control circuitry (16). The coherency control circuitry is configured to look up the non-inclusive cache in response to a coherent access request from a first requestor (4). In response to determining that the coherent access request can be serviced using data stored in a matching entry of the non-inclusive cache, the coherency control circuitry references snoop-filter information associated with the matching entry to determine whether the first requestor can use the data stored in the matching entry without waiting for a response to a snoop of a coherent cache (8).