Coherent Attached Processor Proxy for Cache Coherency
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Solution Overview
Problem
In conventional distributed shared memory computer systems, attached processors often face challenges in participating in system-wide coherency responses due to insufficient speed and reliability of technology, leading to potential delays in cache coherency protocols, which can impact the timely handling of memory access requests.
Innovation Solution
A coherent attached processor proxy (CAPP) is introduced to participate on behalf of the attached processor, determining coherence states and managing memory access requests within the primary coherent system, ensuring compliance with the timing requirements of the coherency protocol by using programmable data structures to handle requests and messages effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an attached processor directly participates in system-wide coherency responses, then cache coherency can be maintained, but the processor may experience delays due to insufficient speed and reliability of the interconnect technology
Solution Approach 1:
A coherent attached processor proxy (CAPP) is introduced as an intermediary component between the attached processor and the primary coherent system. The CAPP participates on behalf of the attached processor in system-wide coherency responses, determining coherence states and managing memory access requests. This mediator approach allows the attached processor to maintain coherency without directly experiencing the delays of the interconnect technology, as the CAPP handles coherency protocol operations independently.
2Adaptability or versatility
If the attached processor uses the existing interconnect technology for memory access, then system integration is achieved, but the speed and reliability are insufficient for timely coherency handling
Solution Approach 1:
The CAPP serves as an intermediary that bridges the attached processor with the primary coherent system through the existing interconnect technology. By handling coherency protocol operations, memory access requests, and coherence state determinations within the CAPP itself, the system achieves timely responses without requiring faster interconnect technology, thus maintaining adaptability while improving speed.
3Loss of time
If a proxy is introduced to handle coherency protocol operations, then response timing is improved, but system complexity increases
Solution Approach 1:
The CAPP is implemented as a relatively simple intermediary component that handles coherency protocol operations. It includes basic functionality for determining coherence states, managing memory access requests, and communicating with the primary coherent system. This straightforward implementation minimizes the increase in system complexity while achieving the desired improvement in response timing.
Data Source
AI summary
A coherent attached processor proxy (CAPP) of a primary coherent system receives a memory access request from an attached processor (AP) and an expected coherence state of a target address of the memory access request with respect to a cache memory of the AP. In response, the CAPP determines a coherence state of the target address and whether or not the expected state matches the determined coherence state. In response to determining that the expected state matches the determined coherence state, the CAPP issues a memory access request corresponding to that received from the AP on a system fabric of the primary coherent system. In response to determining that the expected state does not match the coherence state determined by the CAPP, the CAPP transmits a failure message to the AP without issuing on the system fabric a memory access request corresponding to that received from the AP.