Coherent Attached Processor Proxy for Cache Coherence
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In conventional distributed shared memory computer systems, attached processors often struggle to participate in system-wide coherency responses within the required time frame due to insufficient speed, bandwidth, and reliability of the technology used, leading to potential cache coherence issues and latency in memory access.
Innovation Solution
A coherent attached processor proxy (CAPP) is introduced, which receives memory access requests from an attached processor, determines the coherence state, allocates a master machine, updates the coherence state, and services the request, ensuring system-wide coherency responses are made within the necessary time frame, even when the attached processor's communication link has lower speed or reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an attached processor directly participates in system-wide coherency responses, then cache coherence can be maintained, but the communication link speed and reliability are insufficient to meet time frame requirements
Solution Approach 1:
The patent introduces a proxy as an intermediary component between the attached processor and the primary coherent system. The proxy receives coherency requests from the attached processor, determines coherence states, and services requests on behalf of the attached processor. This mediator approach allows the attached processor to participate in coherency responses without directly utilizing the slow communication link for time-critical operations, thereby maintaining cache coherence while overcoming the insufficient communication speed.
2Loss of time
If the attached processor uses its own cache memory, then access latency can be reduced, but the communication link reliability becomes a bottleneck for coherency maintenance
Solution Approach 1:
The proxy serves as a mediator that handles coherency protocol operations between the attached processor's local cache and the primary coherent system. By centralizing coherency management in the proxy, the system can maintain the attached processor's local cache for low-latency access while the proxy ensures reliable coherency maintenance through systematic state tracking and response coordination, isolating the reliability bottleneck from the performance-critical path.
Solution Approach 2:
The patent implements a proxy that creates a virtual representation or copy of the coherency state management functionality. The proxy maintains its own state information about memory blocks and coherence status, allowing it to service requests locally without constantly relying on the communication link with the attached processor. This copying approach enables the system to tolerate communication link unreliability while maintaining fast local access.
3Productivity
If a proxy is introduced to manage coherence states, then timely coherency responses can be achieved, but device complexity increases
Solution Approach 1:
The proxy is designed to perform multiple functions within a single component: it tracks coherence states for multiple memory blocks, services various types of coherency requests (read, write, invalidate), maintains state information, and coordinates responses. By making the proxy multi-functional, the patent achieves timely coherency responses without proportionally increasing system complexity, as one component handles diverse coherency management tasks rather than requiring separate specialized components for each function.
Data Source
AI summary
A coherent attached processor proxy (CAPP) of a primary coherent system receives a memory access request specifying a target address in the primary coherent system from an attached processor (AP) external to the primary coherent system. The CAPP includes a CAPP directory of contents of a cache memory in the AP that holds copies of memory blocks belonging to a coherent address space of the primary coherent system. In response to the memory access request, the CAPP performs a first determination of a coherence state for the target address and allocates a master machine to service the memory access request in accordance with the first determination. Thereafter, during allocation of the master machine, the CAPP updates the coherence state and performs a second determination of the coherence state. The master machine services the memory access request in accordance with the second determination.